• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.5
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• pp.619-633
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• 1993

A new High level hardware Description Language, ASPHODEL(Algorithm Synthesis Pascal Hardware for Optimal Design and Efficient Language), and its algorithm compiler for high level synthesis are described in this paper. The new HDL, appropriated to the description of algorithmic level and lower, models VLSI circuits as an abstracted block which is consisted of input/output ports and hierachical processors to control VLSI complexities with efficiency. Also, in order to improve the descriptive power, popular Pascal programming language is modified to build ASPHODEL syntax rules. ASPHODEL algorithm compiler generates an intermediate form through lexical and syntax analysis from ASPHODEL source codes. To show the validation of presented language and its compiler, those are applied to practical design examples.

• Journal of Broadcast Engineering
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• v.25 no.5
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• pp.655-664
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• 2020

Free viewpoint image synthesis technology is one of the important technologies in the MPEG-I (Immersive) standard. RVS (Reference View Synthesizer) developed by MPEG-I and in use in MPEG group is a DIBR (Depth Information-Based Rendering) program that generates an image at a virtual (intermediate) viewpoint from multiple viewpoints' inputs. RVS uses the mesh surface method based on computer graphics, and outperforms the pixel-based ones by 2.5dB or more compared to the previous pixel method. Even though its OpenGL version provides 10 times speed up over the non OpenGL based one, it still shows a non-real-time processing speed, i.e., 0.75 fps on the two 2k resolution input images. In this paper, we analyze the internal of RVS implementation and modify its structure, achieving 34 times speed up, therefore, real-time performance (22-26 fps), through the 3 key improvements: 1) the reuse of OpenGL buffers and texture objects 2) the parallelization of file I/O and OpenGL execution 3) the parallelization of GPU shader program and buffer transfer.

• Journal of KIISE:Computer Systems and Theory
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• v.30 no.9
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• pp.504-511
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• 2003

The property of circuit symmetry has long been applied to the Problem of minimizing the area and timing of multi-level logic circuits. In this paper, we focus on another important design objective, power minimization, utilizing circuit symmetries. First, we analyze and establish the relationship between several types of circuit symmetry and their applicability to reducing power consumption of the circuit, proposing a set of re-synthesis techniques utilizing the symmetries. We derive an algorithm for detecting the symmetries (among the internal signals as well as the primary inputs) on a given circuit implementation. We then propose effective transformation algorithms to minimize power consumption using the symmetry information detected from the circuit. Unlike many other approaches, our transformation algorithm guarantees monotonic improvement in terms of switching activities, which is practically useful in that user can check the intermediate re-synthesized designs in terms of the degree of changes of power, area, timing, and the circuit structure. We have carried out experiments on MCNC benchmark circuits to demonstrate the effectiveness of our algorithm. On average we reduced the power consumption of circuits by 12% with relatively little increase of area and timing.

• Journal of Korea Spatial Information System Society
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• v.2 no.2 s.4
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• pp.99-115
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• 2000

A geographic information system (GIS) generally has a great deal of geographic data and has a singular storage structure individually. It is very hard to exchange geographic data between geographic information systems which store their geographic data with incompatible formats. Moreover, since it needs large amount of storage space to store geographic data and expensive cost to input them. In this paper, we designed and implemented a SDTS (Spatial Data Transfer Standard) Data Conversion System for Gothic which is an existing geographic information system. In order to convert geographic data without loss of information, we first carefully define a mapping between SDTS data and Gothic data. Especially, since SDTS data are in the format of ISO8211, the FIPS123 library is used to access them. Because the internal data format of Gothic is not open to the public, we also use the Gothic library to access Gothic data. The SDTS data conversion system developed in this paper uses an intermediate file to convert geographic data efficiently. In addition, we use UIL (User Interface Language) to implement a graphic user interface (GUI) of our system.

• Journal of the Korean Regional Science Association
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• v.32 no.4
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• pp.19-38
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• 2016

This study investigates the effects of real exchange rate (RER) on firm level mark-up and export. Using firm level data in Daegu-Gyeongbuk manufacturing industries during 2006-2013, we find that firms adjust their markup in response to the RER changes and this adjustment is heterogeneous with respect to firm and industry characteristics. In particular, an increase in markup following the RER depreciation is greater for firms with lower intermediate input import and higher industry concentration. However, productive firms in this region increase their export, instead of markup, during the RER depreciation. This implies that the productive firms in the region may not retain significant market power: They do not change the final price in local currency to increase selling volume during the RER depreciation (the export price in foreign currency decreases).

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.48 no.1
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• pp.157-165
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• 2011

It is challenging to detect foreground objects when background includes an illumination variation, shadow or structural variation due to its motion. Basically pixel-based background models including codebook-based modeling suffer from statistical randomness of each pixel. This paper proposes an algorithm that incorporates Markov random field model into pixel-based background modeling to achieve more accurate foreground detection. Under the assumptions the distance between the pixel on the input imaging and the corresponding background model and the difference between the scene estimates of the spatio-temporally neighboring pixels are exponentially distributed, a recursive approach for estimating the MRF regularizing parameters is proposed. The proposed method alternates between estimating the parameters with the intermediate foreground detection and estimating the foreground detection with the estimated parameters, after computing it with random initial parameters. Extensive experiment is conducted with several videos recorded both indoors and outdoors to compare the proposed method with the standard codebook-based algorithm.

• Journal of Korean Society of Industrial and Systems Engineering
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• v.41 no.2
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• pp.65-73
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• 2018

The dynamic capabilities of sensing market signals, creating new opportunities and reconfiguring resources and capabilities to new opportunities in a rapidly changing economic environment determines the competitiveness of the enterprise to create added value and survival. This study conceptualized a two-stage performance measurement framework based on the casual model of resource (input)-process-performance (output). We have developed a 'Process capability index' that reflect the dynamic capabilities factors as a key intermediary product linking resource inputs and performance outputs in enterprise performance measurement. The process capability index consists of four elements : manpower (level of human resource), operation productivity, structure and risk management. The DEA (Data Envelopment Analysis) model was applied to the developed performance indicators to analyze the branch office performance of a telecom company. Process capability efficiency (stage 1) uses resource inputs to reach a certain level of process capabilities. In performance result efficiency (stage 2), the process capabilities are used to generate sales revenues and subscribers. The two-stage DEA model derives intermediate output values that optimize the individual stages simultaneously. Some branch offices in the telecom company have focused on process capability efficiency or some other branch offices focused on performance result efficiency. Positioning map using two-stage efficiency decomposition and benchmarking can help identify the sources of inefficiencies and visualize strategic directions for performance optimization. Applications of two-stage DEA in conjunction with the case study that are meaningfully used in performance measurement areas have been scarce. In particular, this paper has the contribution to present a new performance measurement model considering the organization theory, the dynamic capabilities.

• Journal of the Korea Computer Graphics Society
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• v.16 no.4
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• pp.1-10
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• 2010

We present a method to reproduce in-between views from captured stereo images to control depth feeling that a user can perceive on a 3D display. The stereo images captured from a pair of cameras have a fixed viewpoint and a screen parallax which depend on the physical position and the distance between the cameras. In this paper, we produce stereo images of an intermediate viewpoint between two original cameras by a view interpolation on the input stereo images. Furthermore, the camera separation of the reproduced stereo images can be controlled by a linear interpolation coefficient used by the view interpolation. By using the proposed method, stereo images can be reproduced where the depth feeling and a three dimensional effect is suitable for the individual's eye separation or the characteristic of an application.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.2
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• pp.115-122
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• 2016

In this paper, wideband Ku-band downconverter was designed to receiver digital satellite broadcasting. The low-nose downconverter was designed to form four local oscillator frequencies(9.75, 10, 10.75 and 11.3 GHz) representing a low phase noise due to VCO-PLL with respect to input signals of 10.7 to 12.75 GHz and 3-stage low noise amplifier circuit by broadband noise matching, and to select intermediate frequency bands by digital control. The developed low-noise downconverter exhibited the full conversion gain of 64 dB, and the noise figure of low-noise amplifier was 0.7 dB, the P1dB of output signal 15 dBm, and the phase noise -85 dBc@10kHz at the band 1 carrier frequency of 9.75 GHz. The low noise block downconverter(LNB) for wideband digital satellite broadcasting designed in this paper can be used for global satellite broadcasting LNB.

• Journal of Power Electronics
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• v.17 no.3
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• pp.821-834
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• 2017

This paper reports on a single-inductor multiple-output step-up converter with digital control. A systematic analog-to-digital-controller design is explained. The number of digital blocks in the feedback path of the proposed converter has been decreased. The simpler digital pulse-width modulation (DPWM) architecture is then utilized to reduce the power consumption. This architecture has several advantages because counters and a complex digital design are not required. An initially designed unit-delay cell is adopted recursively for the construction of coarse, intermediate, and fine delay blocks. A digital limiter is then designed to allow only useful code for the DPWM. The input voltage is 1.8 V, whereas output voltages are 2 V and 2.2 V. A co-simulation was also conducted utilizing PowerSim and Matlab/Simulink, whereby the 55 nm process was employed in the experimental results to evaluate the performance of the architecture.