• 제목/요약/키워드: integer program

검색결과 122건 처리시간 0.021초

A Lagrangian Relaxation Approach to Capacity Planning for a Manufacturing System with Flexible and Dedicated Machines

  • Lim, Seung-Kil;Kim, Yeong-Dae
    • 한국경영과학회지
    • /
    • 제23권2호
    • /
    • pp.47-65
    • /
    • 1998
  • We consider a multiperiod capacity planning problem for determining a mix of flexible and dedicated capacities under budget restriction. These capacities are controlled by purchasing flexible machines and/or new dedicated machines and disposing old dedicated machines. Acquisition and replacement schedules are determined and operations are assigned to the flexible or dedicated machines for the objective of minimizing the sum of discounted costs of acquisition and operation of flexible machines, new dedicated machines, and old dedicated machines. In this research, the Problem is formulated as a mixed integer linear Program and solved by a Lagrangian relaxation approach. A subgradient optimization method is employed to obtain lower bounds and a multiplier adjustment method is devised to improve the bounds. We develop a linear programming based Lagrangian heuristic algorithm to find a good feasible solution of the original problem. Results of tests on randomly generated test problems show that the algorithm gives relatively good solutions in a reasonable amount of computation time.

  • PDF

작업시간과 육체적인 작업부하를 고려한 혼합모델 조립공정의 라인밸런싱 (Line Balancing for the Mixed Model Assembly Line Considering Processing Time and Physical Workloads)

  • 문성민;권금섭;최경현
    • 산업공학
    • /
    • 제17권3호
    • /
    • pp.282-293
    • /
    • 2004
  • Line Balancing is the problem to assign tasks to stations while satisfying some managerial viewpoints. Most researches about the Mixed-Model Line Balancing problems are focused on the minimizing the total processing time or the number of workstations. Independently, some research reports consider the balance issues of the physical workloads on the assembly line. In this paper, we are presenting a new mathematical model to accomplish the line balance considering both the processing time and the workloads at the same time. To this, end, we propose an zero-one integer program problem, and we use the Chebyshev Goal Programming approach as the solution method. Some computational test runs are performed to compare the pay-offs between the processing time and the workloads. And, the test results show us that the reliable balanced work schedules can be obtained through the proposed model.

컨베이어 분기점에서의 최적 인출 컨베이어 선택 문제 (Optimal Conveyor Selection Problem on a Diverging Conveyor Junction Point)

  • 한용희
    • 산업경영시스템학회지
    • /
    • 제32권3호
    • /
    • pp.118-126
    • /
    • 2009
  • This research investigates the problem of minimizing setup costs in resequencing jobs having first-in, first-out(FIFO) constraints at conveyorized production or assembly systems. Sequence changing at conveyor junctions in these systems is limited due to FIFO restriction. We first define the general problem of resequencing jobs to workstations satisfying precedence relationships between jobs(Generalized Sequential Ordering Problem, GSOP). Then we limit our scope to FIFO precedence relationships which is the conveyor selection problem at a diverging junction(Diverging Sequential Ordering Problem, DSOP), modeling it as a 0-1 integer program. With the capacity constraint removed, we show that the problem can be modeled as an assignment problem. In addition, we proposed and evaluated the heuristic algorithm for the case where the capacity constraint cannot be removed. Finally, we discuss the case study which motivated this research and numerical results.

Optimal Vertical Handover Control Policies for Cooperative Wireless Networks

  • Papadaki, Katerina;Friderikos, Vasilis
    • Journal of Communications and Networks
    • /
    • 제8권4호
    • /
    • pp.442-450
    • /
    • 2006
  • Inter-operability between heterogeneous radio access technologies (RATs), in the sense of seamless vertical han-dover (VHO) support with common radio resource management (CRRM) functionalities, has recently attracted a significant research attention and has become a prominent issue in standardization fora. In this paper, we formulate the problem of load balancing between cooperative RAT's as a mathematical program and by trading off a pre-defined delay tolerance per request we propose a vertical handover batch processing (VHBP) scheme. To quantify the performance of the proposed VHBP scheme we compare it with a baseline processing scheme, where each VHO request is processed independently under a number of different network scenarios. Numerical investigations reveal significant net benefits of the proposed scheme compared with the baseline, both in terms of achieved load balancing levels but also with regard to the acceptance rate of the VHO requests.

MATLAB을 이용한 부동소수점 연산의 특이사항 분석 (Analysis of Some Strange Behaviors of Floating Point Arithmetic using MATLAB Programs)

  • 정태상
    • 전기학회논문지
    • /
    • 제56권2호
    • /
    • pp.428-431
    • /
    • 2007
  • A floating-point number system is used to represent a wide range of real numbers using finite number of bits. The standard the IEEE adopted in 1987 divides the range of real numbers into intervals of [$2^E,2^{E+1}$), where E is an Integer represented with finite bits, and defines equally spaced equal counts of discrete numbers in each interval. Since the numbers are defined discretely, not only the number representation itself includes errors but in floating-point arithmetic some strange behaviors are observed which cannot be agreed with the real world arithmetic. In this paper errors with floating-point number representation, those with arithmetic operations, and those due to order of arithmetic operations are analyzed theoretically with help of and verification with the results of some MATLAB program executions.

경쟁적 입지선정 문제의 안정집합을 찾기 위한 수리적 모형과 유전 알고리즘 (New Mathematical Formulations and an Efficient Genetic Algorithm for Finding a Stable Set in a Competitive Location Problem)

  • 최인찬;김성인;황대호
    • 대한산업공학회지
    • /
    • 제23권1호
    • /
    • pp.223-234
    • /
    • 1997
  • Companies often have to locate their facilities considering competitors' response to their locational decision. One model available in the literature is due to Dobson and Karmarkar, in which a firm has to decide locations so as to prevent competitors from entering the market after the firm's entry. In this paper, we provide new compact binary integer program formulations for their competitive location model and also present an efficient Genetic Algorithm(GA) for finding a (near-)optimal stable set. The GA we propose utilizes a penalty function to handle the feasibility of the problem and modified elitism for better performance of the algorithm. Computational comparisons indicate the superior performance of the GA over the Dobson and Karmarkar's branch and fathom algorithm.

  • PDF

A Dispatching Method for Automated Guided Vehicles to Minimize Delays of Containership Operations

  • Kim, Kap-Hwan;Bae, Jong-Wook
    • Management Science and Financial Engineering
    • /
    • 제5권1호
    • /
    • pp.1-25
    • /
    • 1999
  • There is a worldwide trend to automate the handling operations in port container terminals in an effort to improve productivity and reduce labor cost. This study iscusses how to apply an AGV(automated guided vehicle) system to the handling of containers in the yard of a port container ter-minal. The main issue of this paper is how to assign tasks of container delivery to AGVs during ship operations in an automated port container terminal. A dual-cycle operation is assumed in which the loading and the discharging operation can be performed alternately. Mixed integer linear program-ming formulations are suggested for the dispatching problem. The completion time of all the dis-charging and loading operations by a quayside crane is minimized, and the minimization of the total travel time of AGVs is also considered as a secondary objective. A heuristic method using useful properties of the dispatching problem is suggested to reduce the computational time. The perfor-mance of the heuristic algorithm is evaluated in light of solution quality and computation time.

  • PDF

트랜잭션 중심의 발견적 파일 수직 분한 방법 (A transaction-based vertical partitioning algorithm)

  • 박기택;김재련
    • 한국국방경영분석학회지
    • /
    • 제22권1호
    • /
    • pp.81-96
    • /
    • 1996
  • In a relational database environment, partitioning of data is directly concerned with the amount of data that needs to be required in a query or transaction. In this paper, we consider non-overlapping, vertical partitioning. Vertical partitioning algorithm in this paper is composed of two phases. In phase 1, we cluster the attributes with zero-one integer program that maximize affinity among attributes. The result of phase 1 is called 'Initial Fragments'. In phase 2, we modify Initial Fragments that is not directly considered by cost factors, making use of a transaction-based partitioning method. A transaction-based partitioning method is partitioning attributes according to a set of transactions. In this phase we select logical accesses which needs to be required in a transaction as comparison criteria. In phase 2, proposed algorithm consider only small number of modification of Initial Fragments in phase 1. This algorithm is so insensible to number of transactions and of attributes that it can applied to relatively large problems easily.

  • PDF

A Study on performance Evaluation Technique for new Computer System Selection

  • 김성조
    • 정보과학회지
    • /
    • 제5권2호
    • /
    • pp.41-48
    • /
    • 1987
  • 어느 기관이 컴퓨터 씨스템을 처음 도입하고자 할때, 어떤 씨스템이 그 기관의 고유 업무를 수행하는데 가장 적합한지를 결정하는 일은 무엇보다도 중요 하다. 이와 같은 씨스템 능력 측정의 주요한 목적은 임대료와 컴퓨터 씨스템 구 성이 비슷한 경우 능력 측정을 하고자 하는 기관 고유 업무의 각 기종에 대한 상 대적인 thruput을 알아 보는데 있다.

An On-chip Multiprocessor Miroprocessor with Shared MMU and Cache

  • Lee, Yong-Hwan;Jeong, Woo-Kyeong;An, Sang-Jun;Lee, Yong-Surk
    • Journal of Electrical Engineering and information Science
    • /
    • 제2권4호
    • /
    • pp.1-7
    • /
    • 1997
  • A multiprocessor microprocessor named SMPC(scaleable multiprocessor chip) that contains tow IU (integer unit) is presented in this paper. It can execute multiple instructions from several tasks exploiting task-level parallelism that is free from instruction dependencies, and provide high performance and throughput on both single program and multiprogramming environments. the IU is a 32-bit scalar processor expecially designed to boost up the performance of string manipulations which are frequently used in RDBMS(relational data base management system) applications. A memory management unit and a data cache shared by two IUs improve the performance and reduce the chip area required. ETH SMPC is implemented in VLSI circuit by custom design and automated design tools.

  • PDF