• 제어로봇시스템학회:학술대회논문집
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• 2004.08a
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• pp.777-781
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• 2004

This paper presents an algorithm for multichannel slotted-ring topology medium access protocol (MAC) using in wavelength division multiplexing (WDM) networks. In multichannel ring, there are two main previously proposed architectures: Tunable Transmitter - Fixed Receiver (TTFR) and Fixed Transmitter - Tunable Receivers (FTTR). With TTFR, nodes can only receive packets on a fixed wavelength and can send packets on any wavelengths related to destination of packets. Disadvantage of this architecture is required as many wavelengths as there are nodes in the network. This is clearly a scalability limitation. In contrast, FTTR architecture has advantage that the number of nodes can be much larger than the number of wavelength. Source nodes send packet on a fixed channel (or wavelength) and destination nodes can received packets on any wavelength. If there are fewer wavelengths than there are nodes in the network, the nodes will also have to share all the wavelengths available for transmission. However the fixed wavelength approach of TTFR and FTTR bring low network utilization. Because source node with waiting data have to wait for an incoming empty slot on corresponding wavelength. Therefore this paper presents Tunable Transmitter - Tunable Receiver (TTTR) approach, in which the transmitting node can send a packet over any wavelengths and the receiving node can receive a packet from any wavelengths. Moreover, the self-similar distributed input traffic is used for evaluation of the performance of the proposed algorithm. The self-similar traffic performs better performance over long duration than short duration of the Poison distribution. In order to increase bandwidth efficiency, the Destination Stripping approach is used to mark the slot which has already reached the desired destination as an empty slot immediately at the destination node, so the slot does not need to go back to the source node to be marked as an empty slot as in the Source Stripping approach. MATLAB simulator is used to evaluate performance of FTTR, TTFR, and TTTR over 4 and 16 nodes ring network. From the simulation result, it is clear that the proposed algorithm overcomes higher network utilization and average throughput per node, and reduces the average queuing delay. With future works, mathematical analysis of those algorithms will be the main research topic.

• Proceedings of the KOR-KST Conference
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• 1996.02a
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• pp.59-86
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• 1996

Current methods for evaluating unsignalized intersections, and estimating level-of-service (LOS) is determined from efficiency-based criteria such as little or no delay to very long delays. At present, similar procedures to evaluate intersections using safety-based criteria do not exist. The improvement of sight distances at intersections is the most effective way of improving intersection safety. However, a set of procedures is necessary to account for the limitations in current methodology. Such an approach would build upon such methods, but also account for: deficiencies in the current deterministic solution for the determination of intersection sight distances; opportunity for an accident and severity of an accident; and cost-effectiveness of attaining various levels of sight distances. In this research, a model that estimates the degree of safety at two-way stop-controlled intersections is described. Only crossing maneuvers are considered in this study because accidents caused by the crossing maneuvers are the dominate type among intersection accidents. Monte Carlo methods are used to estimate the hazard at an intersection as a function of roadway features and traffic conditions. Driver`s minimum gap acceptance in the crossing vehicles and headway distribution on the major road are used in the crossing vehicles and headway distribution on the major road are used in the model to simulate the real intersectional maneuvers. Other random variables addressed in the model are: traffic speeds; preception-reaction times of both drivers in the crossing vehicles and drivers in oncoming vehicles on the major road; and vehicles on the major roads. The developed model produces the total number of conflicts per year per vehicle and total potential kinetic energy per year per vehicle dissipated during conflicts as measurements of safety at intersections. Based on the results from the developed simulation model, desirable sight distances for various speeds were determined as 350 feet, 450 feet and 550 feet for 40 mph, 50 mph and 60 mph prevailing speed on the major road, respectively. These values are seven to eight percent less than those values recommended by AASHTO. A safety based level-of-service (LOS) is also developed using the results of the simulation model. When the total number of conflicts per vehicle is less than 0.05 at an intersection, the LOS of the intersection is `A' and when the total number of conflicts per vehicle is larger than 0.25 at an intersection, the LOS is `F'. Similarly, when the total hazard per vehicle is less than 350, 000 1b-ft2/sec2, the LOS is `F'. Once evaluation of the current safety at the intersection is complete, a sensitivity analysis can be done by changing one or more input parameters. This will estimate the benefit in terms of time and budget of hazard reduction based upon improving geometric and traffic characteristics at the intersection. This method will also enable traffic engineers in local governments to generate a priority list of intersection improvement projects.

• The Transactions of the Korea Information Processing Society
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• v.3 no.4
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• pp.947-960
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• 1996

The primary goal for developing high performance ATM switching systems is to minimized the probability of cell loss, cell delay and deterioration of throughput. ATM switching element that is the most suitable for this purpose is the shared buffer memory switch executed by common random access memory and control logic. Since it is difficult to manufacture VLIS(Very Large Scale Integrated circuit) as the number of input ports increased, the used of switching module method the realizes 32$\times$32, 150 Mb/s switch utilizing 8$\times$8, 600Mb/s os 16$\times$16, 150Mb/s unit switch is latest ATM switching technology for small and large scale. In this paper, buffer capacity satisfying total-memory-reduction effect by buffer sharing in a shared buffer memory switch are analytically evalu ated and simulated by computer with cell loss level at traffic conditions, and also features of switching network utilizing the switching module methods in small and large-capacity ATM switching system is analized. Based on this results, the structure in outline of 32$\times$32(4.9Gb/s throughput), 150Mb/s switches under research in many countries is proposed, and eventually, switching-network structure for ATM switching system of small and large and capacity satisfying with above primary goals is suggested.

• KSCE Journal of Civil and Environmental Engineering Research
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• v.14 no.3
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• pp.655-668
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• 1994

Conventional deodorization filters using soil and compost reach the capacity limitation of deodorization in short period, because its removal mechanism primarily depends on adsorption. Therefore, in this study the experiment was performed on the removal of ammonia which is a strong inorganic malodor, frequently emitted from night soil treatment plants and sewage treatment plants, by seeding activated sludges on the bio-peat containing higher organic contents, water conservation capacity, permeability and lower pressure drop. As a result, in raw peat filter natural ammonia outlet was observed in consequence of pH increase resulted from ammonia ionizing in liquid phase. Ammonia removal mechanism primarily depended on the adsorption onto the anion colloidal substances in peat. In peat bio-filter, theoretical ammonium salts ratio was higher than that of raw peat, resulted from slight pH increase by microorganism activity, however, the experimetal value of ammonia-nitrogen accumulated in bio-peat was lower than that of raw peat because of nitrification by nitrifying bacteria. In the initial reaction period, adsorption was predominant in the ammonia removal mechanism, but nitrification was conspicuous after the middle period. Mass balance of nitrogen was established using experimental data of input $NH_3$ loading, output $NH_3$ loading, $NH_4{^+}$-N, $NO_x$-N, and Org-N. The critical time of unsteady state, which is the maximum activating point of microorganism in bio-filter, was determined using experimental data, and the ammonia adsorption curve was computed using regression analysis. On the basis of the results obtained by above analysis, the delay days for the saturation of adsoption capacity in peat bio-filter was calculated.

• Journal of the Korean Society of Hazard Mitigation
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• v.10 no.3
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• pp.119-131
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• 2010

Drought is one of disaster causing factors to produce severe damage in the World because drought is destroyed to the ecosystem as well as to make difficult the economy of the drought area. This study, using Palmer Drought Severity Index carries out correlation analysis with sea surface temperatures. Comparative analysis carries out by calculated Palmer Drought Severity Index and past drought occurrence year. Result of comparative analysis, PDSI indexes were in accord with the past drought. Cluster analysis for correlation analysis carries out using precipitation and temperature that is input datas palmer drought severity index, and the result of cluster analysis was classified as 6. Also, principal component carries out using result of cluster analysis. 14 principal component analyze out through principal component analysis. Using analyzed 14 principal component carries out correlation analysis with sea surface temperature that is delay time from 0month until 11month. Correlation analysis carries out sea surface temperatures and calculated cycle component of the low frequency through Wavelet Transform analysis form principal component. Result of correlation analysis, yang(+) correlation is bigger than yin(-) correlation. It is possible to check similar correlation statistically the area of sea surface temperature with sea surface temperature in the Pacific. Forecasting possibility of the future drought make propose using sea surface temperature.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.10
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• pp.17-28
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• 1999

In this paper, an ASIC emulation system called ACE (ASIC Emulator) is proposed. It can produce the prototype of target ASIC in a short time and verify the function of ASIC circuit immediately The ACE is consist of emulation software in which there are EDIF reader, library translator, technology mapper, circuit partitioner and LDF generator and emulation hardware including emulation board and logic analyzer. Technology mapping is consist of three steps such as circuit partitioning and extraction of logic function, minimization of logic function and grouping of logic function. During those procedures, the number of basic logic blocks and maximum levels are minimized by making the output to be assigned in a same block sharing product-terms and input variables as much as possible. Circuit partitioner obtain chip-level netlists satisfying some constraints on routing structure of emulation board as well as the architecture of FPGA chip. A new partitioning algorithm whose objective function is the minimization of the number of interconnections among FPGA chips and among group of FPGA chips is proposed. The routing structure of emulation board take the advantage of complete graph and partial crossbar structure in order to minimize the interconnection delay between FPGA chips regardless of circuit size. logic analyzer display the waveform of probing signal on PC monitor that is designated by user. In order to evaluate the performance of the proposed emulation system, video Quad-splitter, one of the commercial ASIC, is implemented on the emulation board. Experimental results show that it is operated in the real time of 14.3MHz and functioned perfectly.

• Journal of the Earthquake Engineering Society of Korea
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• v.3 no.3
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• pp.63-74
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• 1999

A sliding mode fuzzy control (SMFC) algorithm is presented for vibration of large structures. Rule-base of the fuzzy inference engine is constructed based on the sliding mode control, which is one of the nonlinear control algorithms. Fuzziness of the controller makes the control system robust against the uncertainties in the system parameters and the input excitation. Non-linearity of the control rule makes the controller more effective than linear controllers. Design procedure based on the present fuzzy control is more convenient than those of the conventional algorithms based on complex mathematical analysis, such as linear quadratic regulator and sliding mode control(SMC). Robustness of presented controller is illustrated by examining the loop transfer function. For verification of the present algorithm, a numerical study is carried out on the benchmark problem initiated by the ASCE Committee on Structural Control. To achieve a high level of realism, various aspects are considered such as actuator-structure interaction, modeling error, sensor noise, actuator time delay, precision of the A/D and D/A converters, magnitude of control force, and order of control model. Performance of the SMFC is examined in comparison with those of other control algorithms such as $H_{mixed 2/{\infty}}$ optimal polynomial control, neural networks control, and SMC, which were reported by other researchers. The results indicate that the present SMFC is an efficient and attractive control method, since the vibration responses of the structure can be reduced very effectively and the design procedure is simple and convenient.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.12
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• pp.39-47
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• 2010

This paper proposes a fully-utilized block-based 2D DWT architecture, which consists of four 1D DWT filters with two-channel QMF PR Lattice structure. For 100% hardware utilization, we propose a new method which processes four input values at the same time. On the contrary to the image-based 2D DWT which requires large memories, we propose a block-based 2D DWT so that we only need 2MN-3N of storages, where M and N stand for filter lengths and width of the image respectively. Furthermore, the proposed architecture processes in horizontal and vertical directions simultaneously so that it computes the DWT for an $N{\times}N$ image within a period of $N^2(1-2^{-2J})/3$. Compared to existing approaches, the proposed architecture shows 100% of hardware utilization and high throughput rate. However, the proposed architecture may suffer from the long critical path delay due to the cascaded lattices in 1D DWT filters. This problem can be mitigated by applying the pipeline technique with maximum four level. The proposed architecture has been designed with VerilogHDL and synthesized using DongbuAnam $0.18{\mu}m$ standard cell.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.9B
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• pp.1742-1754
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• 1999

In this paper, we propose a rate control scheme, using histogram based rate-distortion (R-D) estimation, which produces a consistent picture quality between consecutive frames. The histogram based R-D estimation used in our rate control scheme offers a closed-form mathematical model that enable us to predict the bits and the distortion generated from an encoded frame at a given quantization parameter (QP) and vice versa. The most attractive feature of the R-D estimation is low complexity of computing the R-D data because its major operation is just to obtain a histogram or weighted histogram of DCT coefficients from an input picture. Furthermore, it is accurate enough to be applied to the practical video coding. Therefore, the proposed rate control scheme using this R-D estimation model is appropriate for the applications requiring low delay and low complexity, and controls the output bit-rate ad quality accurately. Our rate control scheme ensures that the video buffer do not underflow and overflow by satisfying the buffer constraint and, additionally, prevents quality difference between consecutive frames from exceeding certain level by adopting the distortion constraint. In addition, a consistent considering the maximum tolerance BER of the voice service. Also in Rician fading channel of K=6 and K=10, considering CLP=$10^{-3}$ as a criterion, it is observed that the performance improment of about 3.5 dB and 1.5 dB is obtained, respectively, in terms of $E_b$/$N_o$ by employing the concatenated FEC code with pilot symbols.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.11 no.3
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• pp.179-196
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• 1986

In this paper, the peformance of a statistical packet voice/data multiplexer is studied. In ths study we assume that in the packet voice/data multiplexer two separate finite queues are used for voice and data traffics, and that voice traffic gets priority over data. For the performance analysis we divide the output link of the multiplexer into a sequence of time slots. The voice signal is modeled as an (M+1) - state Markov process, M being the packet generation period in slots. As for the data traffic, it is modeled by a simple Poisson process. In our discrete time domain analysis, the queueing behavior of voice traffic is little affected by the data traffic since voice signal has priority over data. Therefore, we first analyze the queueing behavior of voice traffic, and then using the result, we study the queueing behavior of data traffic. For the packet voice multiplexer, both inpur state and voice buffer occupancy are formulated by a two-dimensional Markov chain. For the integrated voice/data multiplexer we use a three-dimensional Markov chain that represents the input voice state and the buffer occupancies of voice and data. With these models, the numerical results for the performance have been obtained by the Gauss-Seidel iteration method. The analytical results have been verified by computer simylation. From the results we have found that there exist tradeoffs among the number of voice users, output link capacity, voic queue size and overflow probability for the voice traffic, and also exist tradeoffs among traffic load, data queue size and oveflow probability for the data traffic. Also, there exists a tradeoff between the performance of voice and data traffics for given inpur traffics and link capacity. In addition, it has been found that the average queueing delay of data traffic is longer than the maximum buffer size, when the gain of time assignment speech interpolation(TASI) is more than two and the number of voice users is small.