• Title/Summary/Keyword: inline assembly

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Implementation of MPEG-4 BSAC Audio Decoder using ARM926EJ-S Processors (ARM926EJ-S 프로세서를 이용한 MPEG-4 BSAC 오디오 복호화기의 구현)

  • Jeon, Young-Taek;Park, Young-Cheol
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.1 no.2
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    • pp.91-98
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    • 2008
  • Domestic standard for Korean T-DMB includes MPEG-4 BSAC (Bit Sliced Arithmetic Coding) audio coding that has been established in 2003. This paper presents an implementation and optimization of MPEG-4 BSAC Audio Decoder on ARM926EJ-S processor. Tools and modules of the BSAC audio decoder were implemented with 32-bit fixed point operations. Further optimization was accomplished using ARM926EJ-S Inline Assembly. The optimization was based on the total number of multiplications and MAC (Multiply and Accumulation) operations causing most of core cycles of ARM926EJ-S, and also based on analysis of ARMv5 instructions. The result of optimization was evaluated on the basis of MIPS (Million Instruction per second). Implementation results show that BSAC bitstream at 96kbps can be decoded in real-time at 65MHz CPU clocks.

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Implementation and Verification of JPEG Decoder IP using a Virtual Platform (가상 플랫폼을 이용한 JPEG 디코더 IP의 구현 및 검증)

  • Jung, Yong-Bum;Kim, Yong-Min;Hwang, Chul-Hee;Kim, Jong-Myon
    • Journal of the Korea Society of Computer and Information
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    • v.16 no.11
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    • pp.1-8
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    • 2011
  • The requirement of a system-on-a-chip (SoC) design is increasing, which combines various and complex functional units on a single device. However, short time to market prohibits to release the device. To satisfy this shorter time-to-market, verification of both hardware and software at the same time is important. A virtual platform-based design method supports faster verification of these combined software and hardware by reusing pre-defined intellectual properties (IP). In this paper, we introduce the virtual platform-based design and redesign the existing ARM processor based S3C2440A system using the virtual platform-based method. In addtion, we implement and evaluate the performance of a JPEG decoder on the S3C2440A virtual platform. Furthermore, we introduce an optimized technique of the JPEG decoder using the ARM based inline assembly language, and then verify the performance improvement on the virtual platform. Such virtual platform-based design allows to verify both software and hardware at the same time and can meet the requirement of the shorter time-to-market.