• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2007.05a
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• pp.1157-1161
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• 2007

A construction noise is the main reason for people's petition among the pollution. The purpose of this study is to develop the noise prediction program to see the level of the noise on the construction site more accurately. For this purpose, the database of the power level on the various equipments was made. The noise reduction by distance and the noise reduction by diffraction of barrier were mainly considered and calculated. The simple noise prediction program will provide the information about proper height and length of the potable barrier which satisfies noise criteria of the construction sites from a construction planning stage. To investigate the reliability of this program, the predicted data was compared with the measured data. An average of difference between measured data and predicted data is 1.3 dB(A) and a coefficient of correlation is about 0.95.

• Journal of Information Display
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• v.5 no.3
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• pp.25-29
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• 2004

Effects of additing various types of ceramic fillers to the BZB-based glass on the thermo-chemical stability, optical reflectance, and mechanical properties were investigated. The glass system demonstrated the feasibility to host various types of ceramic fillers to form micro-composites at the processing temperature suitable for PDP systems. The optical reflectance and mechanical strength of the filler-glass composites were improved as compared to the glass itself. These results demonstrate the feasibility of applying the Pb-free BZB-based glass system as a matrix for employing various types of crystalline ceramic fillers to be used as barrier rib materials in plasma display panels.

• JSTS:Journal of Semiconductor Technology and Science
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• v.2 no.2
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• pp.141-146
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• 2002

The effect of the wide-bandgap Schottky barrier enhancement cap layer on the performance of metal-semiconductor-metal photodetectors (MSMPD's) is presented. Judged by the dc characteristics, no considerable increase in recombination loss of carriers is resulted by the incorporation of the cap layer. However, about 45% of the detection efficiency is lost for the cap-layered MSMPD's even with a graded layer incorporated under pulse operation, and it was found to be due mainly to the capturing and slow release of the photocarriers at the heterointerface. The loss mechanism of the pulse detection efficiency is believed to be responsible for the intersymbol interference and the increased bit-error-rate (BER) observed in MSMPD's when used with a high bit rate pseudo-random-bit-stream (PRBS) data pattern.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.5
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• pp.61-66
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• 1997

In this paper we report the fabrication of an InGaAs metal-semiconductor-metal (MSM) photodiode(PD) which an InAlAs barrier enhancement layer that has very low dark current and high speed chracteristics. The detector using Cr/Au schottky metal fingers with 4um spacing on a large active area of 300*300um$^{2}$ offers a low dark current of 38nA at 10V, a low capacitance of 0.8pF, and a high 3-dB bandwidth of 2.4 GHz. To our knowledge, these characteristics are better than any previously published results obtained from large area InGaAs MSM PD's. The RC equivalent model and frequency domain current response model considering transit time were also used to analyze the frequency characteristic of the fabricated device.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.779-782
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• 2003

The theoretical and experimental current-voltage characteristics of Erbium silicided n-type Schottky barrier tunneling transistors (SBTTs) are discussed. The theoretical drain current to drain voltage characteristics show good correspondence and the extracted Schottky barrier height is 0.24 eV. The experimentally manufactured n-type SBTTs with 60 nm gate lengths show typical transistor behaviors in drain current to drain voltage characteristics. The drain current on/off ratio is about 10$^{5}$ at low drain voltage regime in drain current to gate voltage characteristics.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.4
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• pp.381-386
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• 2013

A new resistance model for a Schottky Barrier Diode (SBD) in CMOS technology is proposed in this paper. The proposed model includes the n-well thickness as a variable to explain the operational behavior of a planar SBD which is firstly introduced in this paper. The model is verified using the simulation methodology ATLAS. For verification of the analyzed model and the ATLAS simulation results, SBD prototypes are fabricated using a $0.13{\mu}m$ CMOS process. It is demonstrated that the model and simulation results are consistent with measurement results of fabricated SBD.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.2
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• pp.82-87
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• 2007

The electrical properties of metallic junction diodes and metallic source/drain (S/D) Schottky barrier metal-oxide-semiconductor field-effect transistor (SB-MOSFET) were simulated. By using the abrupt metallic junction at the S/D region, the short-channel effects in nano-scaled MOSFET devices can be effectively suppressed. Particularly, the effects of trap states at the metal-silicide/silicon interface of S/D junction were simulated by taking into account the tail distributions and the Gaussian distributions at the silicon band edge and at the silicon midgap, respectively. As a result of device simulation, the reduction of interfacial trap states with Gaussian distribution is more important than that of interfacial trap states with tail distribution for improving the metallic junction diodes and SB-MOSFET. It is that a forming gas annealing after silicide formation significantly improved the electrical properties of metallic junction devices.

• Journal of the Korean Institute of Telematics and Electronics
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• v.9 no.3
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• pp.22-28
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• 1972

A new full-adder is proposed and it's operation-characteristic is described. The circuit proposed here was improved in operational stability and cicuit-configuration. The circuit is composed of a tunnel diode, Schottky-barrier diodes. The circuit design and it's opration is explained by considering the change of the load line when the input current is applied. The explanations are proved by experimental details.

• Proceeding of EDISON Challenge
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• 2014.03a
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• pp.450-453
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• 2014

쇼트키 장벽 모스펫(Schottky barrier MOSFETs : SB-MOSFETs)은 SB높이(${\Phi}_B$)에 매우 민감하다. 그래서 ${\Phi}_B$를 줄이는 공정 방법에 대한 연구가 활발히 진행 중이다. 이러한 ${\Phi}_B$를 측정할 때, SB-MOSFETs에서가 아닌 SB 다이오드에서 측정이 이뤄지고 있다. 본 논문에서는 ${\Phi}_B$를 SB-MOSFETs에서 측정 할 수 있는 방법을 제안하고 전산모사를 통하여 채널의 길이와 두께, Overlap / Underlap 구조, 온도 등에 대한 의존성을 살펴 보았다. 그 결과 채널의 길이와 두께, Overlap / Underlap 구조에 따른 의존성은 없는 것으로 확인되었다. 하지만 20nm 이하의 채널의 소자에 대해서는 소스/드레인간 터널링 전류로 인해 정확한 ${\Phi}_B$ 측정이 불가능하였다. 그리고 저온에서 측정할 때 정확도가 높아짐을 확인하였다.

• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.5
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• pp.712-718
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• 1986

A shallow n+ layer of implanted phosphorus was used to lower the barrier height of PtSinSi schottky diodes. The reduction of barrier height of the forward turn-on voltages from 400mV to 180mV of the forward was followed by implantation of phosphorus at 35KeV with an ion dose of 8.0x10**12 atoms/cm\ulcornerand was activated at 925\ulcorner for 30min in dry O2. The test result showed that, as the ion-implanted dose increased, the forward turn-on voltage and reverse breakdown voltage were linearly decreased, but the saturation current and ideality factor(n) were linearly increased.