• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.429-429
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• 2012

To investigate the gettering effect of B-doped n-type monocrystalline silicon wafer, we made the p-n junction by diffusing boron into n-type monocrystalline Si substrate and then oxidized the boron doped n-type monocrystalline silicon wafer by in-situ wet and dry oxidation. After oxidation, the minority carrier lifetime was measured by using microwave photoconductance and the sheet resistance by 4-point probe, respectively. The junction depth was analyzed by Secondary Ion Mass Spectrometry (SIMS). Boron diffusion reduced the metal impurities in the bulk of silicon wafer and increased the minority carrier lifetime. In the case of wet oxidation, the sheet resistance value of ${\sim}46{\Omega}/{\Box}$ was obtained at $900^{\circ}C$, depostion time 50 min, and drive-in time 10 min. Uniformity was ~7% at $925^{\circ}C$, deposition time 30 min, and drive-in time 10 min. Finally, the minority carrier lifetime was shown to be increased from $3.3{\mu}s$ for bare wafer to $21.6{\mu}s$ for $900^{\circ}C$, deposition 40 min, and drive-in 10 min condition. In the case of dry oxidation, for the condition of 50 min deposition, 10 min drive-in, and O2 flow of 2000 SCCM, the minority carrier lifetime of 16.3us, the sheet resistance of ${\sim}48{\Omega}/{\Box}$, and uniformity of 2% were measured.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1994.11a
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• pp.54-58
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• 1994

H$_2$ bake and GeH$_4$ clean are used as a in-situ pre-clean method in low temperature Si based epitaxial growth technology using rapid thermal processing chemical vapor deposition (RTPCVD). In this paper, the H$_2$ bake and GeH$_4$ clean processes are optimized for low surface defect density using Taguchi method. In H$_2$ bake process, the epitaxial growth temperature affects dominantly on the surface defect density, and the next affecting factors are H$_2$ bake temperature and rinse time in de-ionised water. In GeH$_4$ clean process, GeH$_4$ clean temperature affects most strongly on the surface defect density, and the minor factor is GeH$_4$flow rate. The optimum process conditions predicted fly Taguchi method agree well with tile experimental data in both in-situ clean processes.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.2
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• pp.125-130
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• 2000

Two step growth of reduced pressure chemical vapor eposition has been successfully developed to achieve in-situ phosphorus-doped silicon epilayers, and the characteristic evolution on their microstructures has been investigated using scanning electron microscopy, transmission electron microscopy, and secondary ion mass spectroscopy. The two step growth, which employs heavily in-situ P doped silicon buffer layer grown at low temperature, proposes crucial advantages in manipulating crystal structures of in-situ phosphorus doped silicon. In particular, our experimental results showed that with annealing of the heavily P doped silicon buffer layers, high-quality epitaxial silicon layers grew on it. the heavily doped phosphorus in buffer layers introduces into native oxide and plays an important role in promoting the dispersion of native oxides. Furthermore, the phosphorus doping concentration remains uniform depth distribution in high quality single crystalline Si films obtained by the two step growth.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.3
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• pp.235-238
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• 2009

This paper describes the mechanical properties of poly (Polycrystalline) 3C-SiC thin films with $N_2$ in-situ doping. In this work, the poly 3C-SiC film was deposited by APCVD (Atmospheric Pressure Chemical Vapor Deposition) method using single-precursor HMDS (Hexamethyildisilane: $Si_2(CH_3)_6)$ at $1200^{\circ}C$. The mechanical properties of doped poly 3C-SiC thin films were measured by nono-indentation according to the various $N_2$ flow rate. In the case of 0 sccm $N_2$ flow rate, Young's Modulus and hardness were obtained as 285 GPa and 35 GPa, respectively. Young's Modulus and hardness were decreased according to increase of $N_2$ flow rate. The crystallinity and surface roughness was also measured by XRD (X-Ray Diffraction) and AFM (Atomic Force Microscopy), respectively.

• Proceedings of the Korean Vacuum Society Conference
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• 1998.06a
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• pp.87-87
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• 1998

• Proceedings of the Korean Radioactive Waste Society Conference
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• 2017.05a
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• pp.169-170
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• 2017

• Journal of the Korean Ceramic Society
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• v.28 no.12
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• pp.1005-1011
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• 1991

Y-Ba-Cu-O thin films were in-situ fabricated on LaAlO3(100) substrates using the second harmonics of a pulsed Nd:YAG laser. Thin films were deposited under 200 (mtorr) of oxygen atmosphere, when the substrate temperature was changed between 67$0^{\circ}C$ and 82$0^{\circ}C$. After deposition, the films were in-situ annealed at 50$0^{\circ}C$ under 2/3 bar of oxygen pressure. We showed that the deposition temperature affects the formation of superconducting phase, the resistance, and the surface morphology. The Y-Ba-Cu-O thin films deposited at 76$0^{\circ}C$ show the zero resistance critical temperature of 85 K.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.07a
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• pp.861-864
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• 2000

Ferroelectric thin film capacitors with high dielectric constant are important for the application of memory devices. In this work, thin films of PLT(28)(Pb$\sub$0.72/La$\sub$0.28/Ti$\sub$0.93/O$_3$) were fabricated on Pt/Ti/SiO$_2$/Si substrates in-situ annealing and ex-situ annealing have been compared depending on the annealing time. We have systematically investigated the variation of grain sizes depending on the condition of post-annealing and the variation of deposition rate. C-V measurement, ferroelectric properties, leakage current and SEM were performed to investigate the electrical properties and the microstructural properties of Pb(La,Ti)O$_3$.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.29 no.4
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• pp.241-246
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• 2016

ZnO thin films have wide application areas due to its versatile properties as transparent conductors, wide-bandgap n-type semiconductors, gas sensor materials, and etc. We have performed a systematic investigation on ultraviolet-assisted CVD (chemical vapor deposition) method. Ultraviolet irradiation during the deposition of ZnO causes chemical reduction on the growing surface; which results in the reduction of the deposition rate, increase in the surface roughness, and decrease of the electrical resistivity. These effects produce larger characteristic variation with various deposition conditions in terms of surface morphology and optical/electrical properties compared to normal CVD deposited ZnO thin films. This versatile controllability of ultraviolet-assisted CVD can provide a larger processing options in the fabrication of nano-structured materials and flexible device applications.

• Proceedings of the Materials Research Society of Korea Conference
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• 2005.05a
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• pp.80-80
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• 2005