• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.6 no.3
• /
• pp.452-458
• /
• 2002

Although the reuse of the cached data for scrolling the map reduces the amount of passed data between client and server, it needs the conversions of data coordinates, selertive deletion of objects and cache compaction at client. The conversion is time intensive operation due to limited resources of mobile phones such as low computing power, small memory. Therefore, for the efficient map control in the vector map service based mobile phone, it is necessary to study the method for reducing wireless network bandwidth and for overwhelming the limited resources of mobile phone as well. This paper proposes the methods for racking pre-received spatial objects in client-server systems for mobile CIS. We also analyze the strengths and drawbacks between the reuse of cached data and transmission of raw data respectively.

• IEIE Transactions on Smart Processing and Computing
• /
• v.6 no.1
• /
• pp.27-38
• /
• 2017

Packet classification is one of the essential functionalities of Internet routers in providing quality of service. Since the arrival rate of input packets can be tens-of-millions per second, wire-speed packet classification has become one of the most challenging tasks. While traditional packet classification only reports a single matching result, new network applications require multiple matching results. Ternary content-addressable memory (TCAM) has been adopted to solve the multi-match classification problem due to its ability to perform fast parallel matching. However, TCAM has a fundamental issue: high power dissipation. Since TCAM is designed for a single match, the applicability of TCAM to multi-match classification is limited. In this paper, we propose a cost- and energy-efficient multi-match classification architecture that combines TCAM with a tuple space search algorithm. The proposed solution uses two small TCAM modules and requires a single-cycle TCAM lookup, two SRAM accesses, and several Bloom filter query cycles for multi-match classifications.

• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.9 no.6
• /
• pp.63-68
• /
• 2009

In the whole information technology area, the protection of information from hacking or tapping becomes a very serious issue. Therefore, the more effective, convenient and secure methods are required to make the safe operation. Encryption algorithms are known to be computationally intensive. They consume a significant amount of computing resources such as CPU time and memory. In this paper we propose the scalable encryption scheme with four criteria, the compression of plaintext, variable size of block, selectable round and software optimization. We have tested our scheme by c++. Experimental results show that our scheme achieves the faster execution speed of encryption/decryption.

• Publications of The Korean Astronomical Society
• /
• v.19 no.1
• /
• pp.77-81
• /
• 2004

A high performance computing cluster for astronomical computations has been built at Korea Astronomy Observatory. The 64 node cluster interconnected with Gigabit Ethernet is composed of 128 Intel Xeon processors, 160 GB memory, 6 TB global storage space, and an LTO (Linear Tape-Open) tape library. The cluster was installed and has been managed with the Open Source Cluster Application Resource (OSCAR) framework. Its performance for parallel computations was measured with a three-dimensional hydrodynamic code and showed quite a good scalability as the number of computational cells increases. The cluster has already been utilized for several computational research projects, some of which resulted in a few publications, even though its full operation time is less than one year. As a major resource of the $K^*Grid$ testbed, the cluster has been used for Grid computations, too.

• Journal of Advanced Navigation Technology
• /
• v.13 no.6
• /
• pp.854-860
• /
• 2009

Ubiquitous is a new computing environment with IT technology and information communication, and appling various equipments likes PDA and application parts. Recently, user's using environment is changing to smart phone and is expanded learning tools to learner without educational environment. Thus, in this paper, we designed SCORM based meta-data to use smart phone. For this purpose, we made U-learning server and smart phone process server that is to handling with existence LMS and SCORM. To apply smart phones characteristics that have different ones each other, meta-data was able to have some resource information as like CPU, screen size and memory. The meta-data adapter could be process the characteristics.

• Journal of KIISE:Computing Practices and Letters
• /
• v.14 no.3
• /
• pp.291-295
• /
• 2008

In this paper, we propose an input image reduction method to solve the problems of Radon transform which is a line structure analysis tool to correct a rotated object through a vision system. First we extract an object image removed background from the input image. Then we also select a reduced object image as a final input mage of Radon transform from the object image by considering slope. Finally we extract a rotated angle by using Radon transform with the final input image and correct the rotated object with the angle. In experimental results, we could improve the process time of about 64%, reduce the memory space of about 18% and make progress the line detection rate of about 18%.

• Journal of Internet Computing and Services
• /
• v.3 no.2
• /
• pp.1-13
• /
• 2002

Recently, Internet GIS(Geographic Information System) is increasing. From the results, more efficient spatial data retrieval is needed. For more efficient retrieval, a spatial indexing method is needed. This paper proposes an efficient spatial indexing method for levelized geometric data retrieval. Previous indexing methods are not adequate to retrieve levelized geometric data. For the effects, a few indexing methods for levelized geometric data, are known. But these methods support only a tew kinds of levelized geometric data. The proposed method supports all kind of levelized geometric data and outperforms to the previous method both in retrieval time and memory capacity.

• Journal of Internet Computing and Services
• /
• v.7 no.1
• /
• pp.39-47
• /
• 2006

The evaluation of MDx family hash functions such as MD5 is difficult because the design background or a generalized model is unknown. In this paper, an approximated model is proposed to generalize hash functions. The diffusion of a input difference is tested by an approximated model for MD5. The results show that MD5 does not provide perfect diffusion, so MD5 is weak against some attacks. We propose a multiple chaining pattern which provides perfect diffusion in approximated model of hash function without extra calculation or memory. And We show the probability of differential characteristics of our proposal.

• IEMEK Journal of Embedded Systems and Applications
• /
• v.15 no.2
• /
• pp.51-60
• /
• 2020

Optical character recognition (OCR) has been studied for decades because it is very useful in a variety of places. Nowadays, OCR's performance has improved significantly due to outstanding deep learning technology. Thus, there is an increasing demand for commercial-grade but affordable OCR systems. We have developed a low-cost, high-performance OCR system for the industry with the cheapest embedded developer kit that supports GPU acceleration. To achieve high accuracy for industrial use on limited computing resources, we chose a state-of-the-art text recognition algorithm that uses an end-to-end deep learning network as a baseline model. The model was then improved by replacing the feature extraction network with the best one suited to our conditions. Among the various candidate networks, EfficientNet-B3 has shown the best performance: excellent recognition accuracy with relatively low memory consumption. Besides, we have optimized the model written in TensorFlow's Python API using TensorFlow-TensorRT integration and TensorFlow's C++ API, respectively.

• IEIE Transactions on Smart Processing and Computing
• /
• v.4 no.2
• /
• pp.71-77
• /
• 2015

Upcoming ground-breaking applications for always-on tiny interconnected devices steadily demand two-fold features of processor cores: aggressively low power consumption and enhanced performance. We propose implementation of a novel superscalar low-power processor core with a low supply voltage. The core implements intra-core low-power microarchitecture with minimal performance degradation in instruction fetch, branch prediction, scheduling, and execution units. The inter-core lockstep not only detects malfunctions during low-voltage operation but also carries out software-based recovery. The chip incorporates a pair of cores, high-speed memory, and peripheral interfaces to be implemented with a 65nm node. The processor core consumes only 24mW at 350MHz and 0.68V, resulting in power efficiency of $80{\mu}W/MHz$. The operating frequency of the core reaches 850MHz at 1.2V.