• Title/Summary/Keyword: in-circuit test

Search Result 1,629, Processing Time 0.03 seconds

Development of Wound Rotor Synchronous Motor for Belt-Driven e-Assist System

  • Lee, Geun-Ho;Lee, Heon-Hyeong;Wang, Qi
    • Journal of Magnetics
    • /
    • v.18 no.4
    • /
    • pp.487-493
    • /
    • 2013
  • The automotive industry is showing widespread interest in belt-driven electric motor-assisted (e-Assist) systems. A belt-driven assist system (BAS) starts and assists the combustion engine in place of the conventional generator. In this study, a water-cooled wound rotor synchronous motor (WRSM) for the e-Assist system was designed and analyzed. The performance of the WRSM was compared with that of an interior permanent magnet synchronous motor (IPMSM). The WRSM efficiency can be improved for the BAS by adjusting the field flux at high speeds. The field current map to obtain the maximum efficiency based on the speed and torque was developed. To control the field flux via field current control in the WRSM, a general H-bridge circuit was added to the WRSM inverter to get the rapid current response in the high-speed region; the characteristics were compared with the chopper circuit. A WRSM developed for the belt-driven e-Assist system and a prototype 115 V power electronic converter to drive the WRSM were tested with a 900 cc combustion engine. The test results showed that the WRSM-type e-Assist system had good characteristics and could successfully start and assist the 900 cc combustion engine.

Quench and Recovery Characteristics of Non-Inductively Wound HTS Coils with Various Winding (권선방식에 따른 무유도 권선형 HTS 코일의 퀜치 및 회복 비교특성)

  • Jo, Hyun-Chul;Chang, Ki-Sung;Kim, Young-Jae;Choi, Suk-Jin;Hwang, Young-Jin;Kim, Won-Cheol;Ko, Tae-Kuk
    • Progress in Superconductivity and Cryogenics
    • /
    • v.12 no.1
    • /
    • pp.37-41
    • /
    • 2010
  • To limit fault current in a power system, superconducting fault current limiters (SFCLs) using high temperature superconducting (HTS) coils have been developed by many research groups so far. Non-inductive winding of HTS coils used for SFCLs can be classified into solenoid winding and pancake winding. Each of winding is expected to have different quench and recovery characteristics because the structure of solenoid winding differs from pancake winding's. Therefore it is important to the SFCLs application to investigate characteristics of each winding. In this paper, we deal with quench and recovery characteristics of four kinds of winding : solenoid winding, pancake winding without spacers, and with spacers of 2 and 4 mm thickness. In order to obtain quench and recovery parameters of coils, short circuit tests were performed in liquid nitrogen.

A Study on the Circuit Composition and Characteristics Analysis for Heavy-Duty Vehicular Hybrid Hydraulic Driving System (대형 자동차 하이브리드 유압 구동시스템의 회로구성과 특성해석에 관한 연구)

  • 이재구;이재천;한문식
    • Transactions of the Korean Society of Automotive Engineers
    • /
    • v.12 no.2
    • /
    • pp.197-204
    • /
    • 2004
  • An accumulator in hydraulic systems stores kinetic energy during braking action, and then that controls hasty surge pressure. An energy recovery system using accumulator seems to be advantageous for ERBS due to its high energy density. This study suggests a method to decide suitable accumulator volume for ERBS. The method is based upon energy conservation between kinetic energy of moving inertia and elastic energy of accumulator. The energy conversion was analyzed and a simple formula was derived. Also accumulator tests were conducted for different load mass and motor speed. A series of test work were carried out in the laboratory and the dynamic characteristics of the hydraulic motor system, such as the surge pressure and response time, were investigated in both brake action and acceleration action and these results show that the proposed design is effective for decision accumulator volume in ERBS.

Dynamic Power Supply Current Testing for Open Defects in CMOS SRAMs

  • Yoon, Doe-Hyun;Kim, Hong-Sik;Kang, Sung-Ho
    • ETRI Journal
    • /
    • v.23 no.2
    • /
    • pp.77-84
    • /
    • 2001
  • The detection of open defects in CMOS SRAM has been a time consuming process. This paper proposes a new dynamic power supply current testing method to detect open defects in CMOS SRAM cells. By monitoring a dynamic current pulse during a transition write operation or a read operation, open defects can be detected. In order to measure the dynamic power supply current pulse, a current monitoring circuit with low hardware overhead is developed. Using the sensor, the new testing method does not require any additional test sequence. The results show that the new test method is very efficient compared with other testing methods. Therefore, the new testing method is very attractive.

  • PDF

putting out lights detector LED Type Signal light Test of a Patented Article Manufacture.Establishment.Examination Report (단심검지기(LED형 신호등용) 시제품 제작.설치.시험에 관한 보고)

  • Kho, Yeong-Whan;Seok, Tae-Woo;Ko, Yang-ok
    • Proceedings of the KSR Conference
    • /
    • 2007.05a
    • /
    • pp.1650-1655
    • /
    • 2007
  • A lights-out detector, which helps the person in charge of maintenance make a quick judgment in the event of a failure of LED-type traffic lights, was explored/developed and installed/ tested, at Seoul Metro, after they developed a patented pilot product in 2005; and, a product improvement test was conducted to ensure reasonable maintenance of signaling facilities. Having better compatibility with existing circuit in use and displaying stable load current, the device makes the maintenance of lights-out detection and alert easier.

  • PDF

Electrical Lifetime Estimation of a Relay by Accelerated Life Test (가속수명시험을 이용한 릴레이의 전기적 수명예측)

  • Kim, Jae-Jung;Chang, Seog-Weon;Son, Young-Kap
    • Transactions of the Korean Society of Mechanical Engineers A
    • /
    • v.32 no.5
    • /
    • pp.430-436
    • /
    • 2008
  • This paper proposes a way to predict electrical lifetime of a relay using Accelerated Life Testings (ALTs). The relay of interest mounting on printed circuit boards is usually under an inrush current stress. The inrush current is generated and accelerated through controlling a lamp switching device in the ALT. We find that the dominant failure mechanism under high levels of inrush current would be contact welding in the contact surface of the relay and the contact welding process is accelerated according to increase in inrush current. The electrical lifetime model based on Inverse Power Law in term of inrush current is proposed, and parameters characterizing relay's lifetime distribution are statistically estimated using ALTA 6 PRO software.

Effect of Microstructure on Corrosion Behavior of TiN Hard Coatings Produced by Two Grid-Attached Magnetron Sputtering

  • Kim, Jung Gu;Hwang, Woon Suk
    • Corrosion Science and Technology
    • /
    • v.5 no.1
    • /
    • pp.15-22
    • /
    • 2006
  • The introduction of two-grid inside a conventional process system produces a reactive coating deposition and increases metal ion ratio in the plasma, resulting in denser and smoother films. The corrosion behaviors of TiN coatings were investigated by electrochemical methods, such as potentiodynamic polarization test and electrochemical impedance spectroscopy (EIS) in deaerated 3.5% NaCl solution. Electrochemical tests were used to evaluate the effect of microstructure on the corrosion behavior of TiN coatings exposed to a corrosive environment. The crystal structure of the coatings was examined by X-ray diffractometry (XRD) and the microstructure of the coatings was investigated by scanning electron microscopy (SEM) and transmission electron spectroscopy (TEM). In the potentiodynamic polarization test and EIS measurement, the corrosion current density of TiN deposited by two grid-attached magnetron sputtering was lower than TiN deposited by conventional magnetron type and also presented higher Rct values during 240 h immersion time. It is attributed to the formation of a dense microstructure, which promotes the compactness of coatings and yields lower porosity.

The Circuit Design for the DC Parameter Inspection of Memory Devices (메모리 소자의 DC parameter 검사회로 설계)

  • 김준식;주효남;전병준;이상신
    • Journal of the Semiconductor & Display Technology
    • /
    • v.3 no.1
    • /
    • pp.1-7
    • /
    • 2004
  • In this paper, we have developed the DC parameters test system which inspects the properties of DC parameters for semiconductor products. The developed system is interfaced by IBM-PC. It is consisted of CPLD part, ADC(Analog-to-Digital Converter), DAC(Digital-to-Analog Converter), voltage/current source, variable resistor and measurement part. In the proposed system, we have designed the constant voltage source and the constant current source in a part. In the comparison of results, the results of the simulation are very similar to the ones of the implementation.

  • PDF

Fault Diagnosis in the CA Analyzer and Fault Detection of the Input Sequence (CA 분석기의 오류진단과 오류가 있는 입력수열의 오류탐지)

  • Cho, Sung-Jin;Kwon, Min-Jeong;Yim, Ji-Mi;Kim, Jin-Gyoung;Park, Young-Gyu
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.13 no.10
    • /
    • pp.2129-2139
    • /
    • 2009
  • In this paper, we diagnose the fault in the CA analyzer by setting up the initial value such that the final test signature is a constant regardless of the circuit being tested. This method makes the CA test procedure short and clear. In addition, we detect the fault of the faulty input sequence by using the inverse matrix of the CA state transition matrix.

A Study on the/ Correlation Between Board Level Drop Test Experiment and Simulation

  • Kang, Tae-Min;Lee, Dae-Woong;Hwang, You-Kyung;Chung, Qwan-Ho;Yoo, Byun-Kwang
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.18 no.2
    • /
    • pp.35-41
    • /
    • 2011
  • Recently, board level solder joint reliability performance of IC packages during drop impact becomes a great concern to semiconductor and electronic product manufacturers. The handheld electronic products are prone to being dropped during their useful service life because of their size and weight. The IC packages are susceptible to solder joint failures, induced by a combination of printed circuit board (PCB) bending and mechanical shock during impact. The board level drop testing is an effective method to characterize the solder joint reliability performance of miniature handheld products. In this paper, applying the JEDEC (JESD22-B111) standard present a finite element modeling of the FBGA. The simulation results revealed that maximum stress was located at the outermost solder ball in the PCB or IC package side, which consisted well with the location of crack initiation observed in the failure analysis after drop reliability tests.