• Title/Summary/Keyword: in-circuit test

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Design of clock/data recovery circuit for optical communication receiver (광통신 수신기용 클럭/데이타 복구회로 설계)

  • Lee, Jung-Bong;Kim, Sung-Hwan;Choi, Pyung
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.11
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    • pp.1-9
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    • 1996
  • In the following paper, new architectural algorithm of clock and data recovery circuit is proposed for 622.08 Mbps optical communication receiver. New algorithm makes use of charge pump PLL using voltage controlled ring oscillator and extracts 8-channel 77.76 MHz clock signals, which are delayed by i/8 (i=1,2, ...8), to convert and recover 8-channel parallel data from 662.08 Mbps MRZ serial data. This circuit includes clock genration block to produce clock signals continuously even if input data doesn't exist. And synchronization of data and clock is doen by the method which compares 1/2 bit delayed onput data and decided dta by extracted clock signals. Thus, we can stabilize frequency and phase of clock signal even if input data is distorted or doesn't exist and simplify receiver architecture compared to traditional receiver's. Also it is possible ot realize clock extraction, data decision and conversion simulataneously. Verification of this algorithm is executed by DESIGN CENTER (version 6.1) using test models which are modelized by analog behavior modeling and digital circuit model, modified to process input frequency sufficiently, in SPICE.

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A Novel Zero-Crossing Compensation Scheme for Fixed Off-Time Controlled High Power Factor AC-DC LED Drivers

  • Chang, Changyuan;Sun, Hailong;Zhu, Wenwen;Chen, Yao;Wang, Chenhao
    • Journal of Power Electronics
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    • v.16 no.5
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    • pp.1661-1668
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    • 2016
  • A fixed off-time controlled high power factor ac-dc LED driver is proposed in this paper, which employs a novel zero-crossing-compensation (ZCC) circuit based on a fixed off-time controlled scheme. Due to the parasitic parameters of the system, the practical waveforms have a dead region. By detecting the zero-crossing boundary, the proposed ZCC circuit compensates the control signal VCOMP within the dead region, and is invalid above this region. With further optimization of the parameters KR and Kτ of the ZCC circuit, the dead zone can be eliminated and lower THD is achieved. Finally, the chip is implemented in HHNEC 0.5μm 5V/40V HVCMOS process, and a prototype circuit, delivering 7~12W of power to several 3-W LED loads, is tested under AC input voltage ranging from 85V to 265V. The test results indicate that the average total harmonic distortion (THD) of the entire system is approximately 10%, with a minimum of 5.5%, and that the power factor is above 0.955, with a maximum of 0.999.

Development of a voltage-controlled output current source for zenor diode degradation analysis (제너다이오드의 열화평가를 위한 전압제어 출력 전류원 개발)

  • Kim, Jong-ho;Chang, Hong-ki;Kwon, Young-mok;Che, Gyu-shik
    • Journal of Advanced Navigation Technology
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    • v.21 no.5
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    • pp.501-507
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    • 2017
  • When zenor diode load current is necessary to be controlled by input voltage as a circuit load, existing voltage controlling method cannot be applied to it because the output current of zenor diode is changed due to breakdown voltage variations. We propose input voltage controlled output current source regardless of zenor breakdown voltage variation due to degradation resulted from severe current applied electronic component life test as a circuit load in this paper. We show breakdown voltage characteristics of this zenor diode circuit through simulation, applying adequate values for each component in order to verify the circuit composed of that method, and then show the result in which output current is controlled by input voltage. We confirmed the output current varies proportional to input voltage, and developed circuit shows a constant value independent of zenor diode breakdown voltage variations due to component degradations.

A study on High Voltage Squarewave Pulse Generator (고전압 구형파 펄스 발생기에 관한 연구)

  • Kim, Young-Bae;Ryu, Hong-Je;Kim, Jong-Soo
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.57 no.6
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    • pp.1022-1025
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    • 2008
  • This paper presents the generation of the high voltage squarewave pulse using distributed RLC circuit. The demonstrated test was performed with the distributed RLC circuit which consists of the resistance, the inductance and the capacitance. Pspice simulation was also conducted about the experiment circuit. The result of the experiment was in good agreement with the result of the simulation. Theoretical analysis of the initial peak value at the squraewave pulse was derived from the results of the experiment and simulation. Additionally, the characteristics of the time delay was analyzed about the spherical gap switch and the surface discharge gap switch, respectively. It is concluded that the surface discharge gap switch is better than the spherical gap switch to reduce the time delay.

Pneumatic circuit design and Performance test of Air balancer (에어밸런서 공압 회로의 설계 및 성능 실험)

  • Kim, D.S.;Bae, S.K.
    • Transactions of The Korea Fluid Power Systems Society
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    • v.3 no.3
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    • pp.20-24
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    • 2006
  • Air balancer is a conveyance cargo-handling machine, used in assembly and process lines of car and machining industries. This can lift up an object, the weight of which is from 5 to 200 kg, and moves it to a position. As industrial technologies evolve, it is required to move an object and fit it into a specified position with greater accuracy, rather than performing simple tasks such as lifting objects up and down as conventional ones do. There is also a demand to handle an object with one hand, rather than with two hands,. Through designs of manifold unit for an air balancer function, pilot regulator unit to keep pressure constant, hand unit for an accurate load perception function, and air balancer circuit, this study enables everybody to work it with ease and convenience. Experiments and comparisons were conducted for the performance evaluation of the circuit.

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The construction of 3-phase 90 MVA short-time withstand current testing facilities (3상 90 MVA 단시간전류시험 설비 구축)

  • Suh, Yoon-Taek;Kim, Yong-Sik;Yun, Hak-Dong;Kim, Maeng-Hyun
    • Proceedings of the KIEE Conference
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    • 2005.07a
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    • pp.700-702
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    • 2005
  • The most electrical apparatus should be able to withstand short-time current and peak current during a specified short time until circuit breakers have interrupted fault current. It defines the short-time withstand ability of electric a apparatus to be remain for a time interval under high fault current conditions. It is specified by both dynamic ability and thermal capability. KERI(Korea Electrotechlology Research Institute) recently constructed the new short-time current and low voltage short circuit testing facilities. This paper shows short- circuit calculation of transformer and describes high current measuring system, and evaluate the result of short-time withstand test used in $3{\phi}$ 90MVA short-time current testing facilities.

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An Integrated System for Macromodel Development (마크로모델 개발을 위한 통합 시스템)

  • 박진규;정의영;김경호
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.9
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    • pp.146-155
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    • 1994
  • In this paper, we desribe a new system, called BEST, that is used to develop a macromodel or behavioral model easily. It automatically calculates the component values of macromodel represented by equations to satisfy the given specification. Also, it gives the way to analyze both the behavioral model and transistor level circuit, and then compare the analysis results of them to check the correspondence under specific temperature and bias condition, and BEST optimizes the component values of macromodel. Other feature is to characterize MOSFET as switch model which consists of PWL-RC network. Finally, it is possible to generage multi-level netlist which consists of macro/switch/transistor level circuits, and user can determine the trade-off between simulation speed and accuracy. With the graphic user interface form of macromodel development system described above. BEST enable designers to make macromodel by themselves and to uas it. We applied BEST to develop the macromodel for the test circuit and got the 18.6 times simulation speed up with preserving the accuracy within 10% compared to the conventional transistor level circuit simulation. Also, applicability of optimization capability was verified.

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Analysis of SLF Interruption Performance of Self-Blast Circuit Breaker by Means of CFD Calculation

  • Kim, Hong-Kyu;Chong, Jin-Kyo;Lee, Se-Hee
    • Journal of Electrical Engineering and Technology
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    • v.9 no.1
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    • pp.254-258
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    • 2014
  • This paper presents the performance analysis results of a short line fault interruption of a gas circuit breaker, particularly a self-blast type breaker. Hot gas flow analysis was carried out using a CFD calculation combined with the arc model and nozzle ablation model. To evaluate the interruption performance, the index function was defined using the pressure in the heating chamber and the density above the arc region. The simulation and test results showed that the gas flow field and suitable choice of an interruption performance index can be used to predict the interruption characteristics and provide guidelines for designing self-blast breakers with a higher interruption capability.

Evaluation Method II of the Small Current Breaking Performance of SF$_6$-Blown High-Voltage Gas Circuit Breakers (초고압 $SF_6$가스차단기의 소전류 차단성능 해석기술 II)

  • 송기동;이병윤;박경엽;박정후
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.50 no.8
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    • pp.384-391
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    • 2001
  • The insulation strength between contacts after current interruption to the transient recovery voltage i.e., the dielectric recovery strength should be estimated for the evaluation of the small capacitive current interruption capability. Many authors have used theoretical and semi-experimental approaches to evaluate the transient breakdown voltage after the current interruption. Moreover, an empirical equation, which is obtained from a series of tests, has been used to estimated the dielectric recovery strength. Un this paper, the theoretical method which is generated from the streamer theory has been applied to real circuit breakers in order to evaluated the interruption capability. The results of analysis have been compared with the test results and the reliability has been investigated.

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Equivalent Circuit and Characteristics Analysis of LIM Considering the Time Harmonics (시간고조파를 고려한 선형유도전동기의 등가회로와 특성해석)

  • Jang, S.M.;Lee, H.G.;Park, Y.T.
    • Proceedings of the KIEE Conference
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    • 1996.11a
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    • pp.305-307
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    • 1996
  • Because most LIM is driven by inverter, input voltage is involved with the time harmonics. Therefore the equiLlQ/ent circuit for an inverter-fed LIM has to be modified to represent every harmonics present in supply voltage. This paper analyzes the characteristics and loss of LIM to construct the equivalent circuit for each time harmonics through the static test and theoretical analysis. To make an analysis of nonsinusoidal supply waveforms, it is developed the simulation program to calculate the RMS, peak value and THD for any waveforms expressing Fourier series.

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