• Proceedings of the KIEE Conference
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• 1998.07c
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• pp.908-910
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• 1998

Modern AC electric car has PWM(Pulse Width Modulation) -controlled converters, which give rise to higher harmonics. The current harmonics injected from AC electric car is propagated through power feeding circuit. As the feeding circuit is a distributed constant circuit composed of RLC, the capacitance of the feeding circuit and the inductance on the side of power system cause a parallel resonance and a magnification of current harmonics at a specific frequency. The magnified current harmonics usually brings about various problems. That is, the current harmonics makes interference in the adjacent lines of communications and the railway signalling system. Furthermore, in case it flows on the side of power system, not only overheating and vibration at the power capacitors but also wrong operation at the protective devices can occur. Therefore, the exact assessment of the harmonic current flow must be undertaken at design and planning stage for the electric traction systems. From these point of view, this study presents an approach to model and to analyse traction power feeding system focused on the amplification of harmonic current. The proposed algorithm is applied to a standard AT(Auto-transformer)-fed test system in which electric car with PWM-controlled converters is running.

• Proceedings of the KSR Conference
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• 1999.11a
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• pp.318-325
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• 1999

Modern AC electric car has PWM(Pulse Width Modulation)-controlled converters, which give rise to higher harmonics. The current harmonics injected from AC electric car is propagated through power feeding circuit, As the feeding circuit is a distributed constant circuit composed of RLC, the capacitance of the feeding circuit and the inductance on the side of power system cause a parallel resonance and a magnification of current harmonics at a specific frequency. The magnified current harmonics usually brings about various problems. That is, the current harmonics makes interference in the adjacent lines of communications and the railway signalling system. Furthermore, in case it flows on the side of power system, not only overheating and vibration at the power capacitors but also wrong operation at the protective devices can occur. Therefore, the exact assessment of the harmonic current flow must be undertaken at design and planning stage for the electric traction systems. From these point of view, this study presents an approach to model and to analyse traction power feeding system focused on the amplification of harmonic current The proposed algorithm is applied to a standard AT(Auto-transformer)-fed test system in which electric car with PWM-controlled converters is running.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.8
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• pp.86-96
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• 2000

The representative area among the ones whose cost increases as the integration ratio increases is the test area. As the relative cost of hardware decreases, the BIST method has been focued on as the future-oriented test method. The biggest drawback of it is the increasing test time to obtain the acceptable fault coverage. This paper proposed a BIST implementation method to reduce the test times. This method uses an input grouping and test point insertion method, in which the definition of test point is different from the previous one. That is, the test points are defined on the basis of the internal nodes which are the reference points of the input grouping and are merging points of the grouped signals. The main algorithms in the proposed method were implemented with C-language, and various circuits were used to apply the proposed method for experiment. The results showed that the test time could be reduced to at most $1/2^{40}$ of the pseudo-random pattern case and the fault coverage were also increased compared with the conventional BIST method. The relative hardware overhead of the proposed method to the circuit under test decreases as th e size of the circuit to be tested increases, and the delay overhead by the BIST utility is negligible compared to that of the original circuit. That means, the proposed method can be applied efficiently to large VLSI circuits.

• 제어로봇시스템학회:학술대회논문집
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• 2004.08a
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• pp.558-560
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• 2004

Studies on the controlled switching method have been done to prevent the power system surges which cause the insulation deterioration and electro magnetic compatibility (EMC) problems during closing and opening of a circuit breaker. The controlled switching method controls the closing and tripping time in coincidence with the voltage or current to suppress switching surge. It is used to switch condenser bank, no load transformer, and shunt reactor. In this study, basic concept of the controlled switching is introduced, and also the test is performed to find parameters of the controlled switching in a 24kV vacuum circuit. And then, the control device hardware using TMS320C31 DSP has been designed and manufactured. It has been found that the application of IT technology to a circuit breaker is very effective to depress the switching surge.

• Journal of Electrical Engineering and Technology
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• v.8 no.5
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• pp.1182-1187
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• 2013

Transient radiation is emitted during a nuclear explosion and causes fatal errors as upset and latch-up in CMOS circuits. This paper proposes the transient radiation SPICE models of NMOS, PMOS, and INVERTER based on the transient radiation analysis using TCAD (Technology Computer Aided Design). To make the SPICE model of a CMOS circuit, the photocurrent in the PN junction of NMOS and PMOS was replaced as current source, and a latch-up phenomenon in the inverter was applied using a parasitic thyristor. As an example, the proposed transient radiation SPICE model was applied to a CMOS NAND circuit. The CMOS NAND circuit was simulated by SPICE and TCAD using the 0.18um CMOS process model parameter. The simulated results show that the SPICE results were similar to the TCAD simulation and the test results of commercial CMOS NAND IC. The simulation time was reduced by 120 times compared to the TCAD simulation.

• The Transactions of the Korean Institute of Power Electronics
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• v.25 no.5
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• pp.412-419
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• 2020

In this study, a 70 W buck converter using GaN metal-oxide-semiconductor field-effect transistor (MOSFET) is developed. This converter exhibits over 97 % efficiency, high power density, and 48 V-to-12 V/1.2 V/1 V (triple output). Three gate drivers and six GaN MOSFETs are placed in a 1 ㎠ area to enhance power density and heat dissipation capacity. The theoretical switching and conduction losses of the GaN MOSFETs are calculated. Inductances, capacitances, and resistances for the output filters of the three buck converters are determined to achieve the desired current, voltage ripples, and efficiency. An equivalent circuit model for the thermal analysis of the proposed triple-output buck converter is presented. The junction temperatures of the GaN MOSFETs are estimated using the thermal model. Circuit operation and temperature analysis are evaluated using a circuit simulation tool and the finite element analysis results. An experimental test bed is built to evaluate the proposed design. The estimated switch and heat sink temperatures coincide well with the measured results. The designed buck converter has 130 W/in³ power density and 97.6 % efficiency.

• Proceedings of the KIEE Conference
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• 1995.07c
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• pp.1359-1361
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• 1995

This paper describes the method of diagnosis for power transformer, using vibration signal analysis. Vibration signal to be made from transformer is the liner combination of load current, applied voltage and internal temperature. This study measured the vibration signal by before and after short circuit test of the transformer. And the signal analysis and comparison was carried out for AR modeling and frequency analysis.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2003.11a
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• pp.366-370
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• 2003

This paper introduces a new design and fabrication technology of 28 GHz low-cost up and down converter modules for digital microwave radios, The design of the converter module is based on unit circuit blocks, which are to be characterized using a special test fixture. Based on the cascade analysis of the module the 28 GHz up and down converter modules have been designed and implemented. The measured module performance agrees with the cascade analysis. New components such as a tapped edge-coupled filter and a new Ka-band waveguide-to-microstrip transition, which are less sensitive to fabrication tolerances, have been used in the module implementation.

• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.1947-1948
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• 2008

This paper presents the implementation of Power Line Communication(PLC) module which can reduce standby-power consumption. The suggested PLC module consists of PLC modem, coupling circuit, ZCP(Zero-Cross Point) Circuit and main SMPS control relay. The test results under power line communication test-bed used home appliance show the 77% saving of standby-power.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.7
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• pp.1455-1462
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• 2012

In this paper, a BCD process based high-reliability 24-bit dual-port eFuse OTP Memory for PMICs is designed. We propose a comparison circuit at program-verify-read mode to test that the program datum is correct by using a dynamic pseudo NMOS logic circuit. The comparison result of the program datum with its read datum is outputted to PFb (pass fail bar) pin. Thus, the normal operation of the designed OTP memory can be verified easily by checking the PFb pin. Also we propose a sensing margin test circuit with a variable pull-up load out of consideration for resistance variations of programmed eFuse at program-verify-read mode. We design a 24-bit eFuse OTP memory which uses Magnachip's $0.35{\mu}m$ BCD process, and the layout size is $289.9{\mu}m{\times}163.65{\mu}m$ ($=0.0475mm^2$).