• Title/Summary/Keyword: in-circuit test

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ICT inspection System for Flexible PCB using Pin-driver and Ground Guarding Method (핀 드라이버와 접지가딩 기법을 적용한 모바일 디스플레이용 연성회로기판의 ICT검사 시스템)

  • Han, Joo-Dong;Choi, Kyung-Jin;Lee, Young-Hyun;Kim, Dong-Han
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.47 no.6
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    • pp.97-104
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    • 2010
  • In this paper, ICT (in circuit tester) inspection system and inspection algorithm is proposed and detects whether inferiority exists or not in the mounted device on the flexible PCB in cell phones or mobile display devices. The system is composed of PD (pin-driver) and GGM (ground guarding method). The structural characteristics of these flexible PCB are analyzed, which is needed to input or output the test signal. Test signal to investigate the characteristics of passive components is generated using modified circuit diagram and proposed inspection algorithm. PM (pin-map) is decided on the basis of circuit diagram and has the information about the kind of test signal to be applied and the pad number for the test signal to be connected. PD is designed to load a proper test signal for a specific pad and is adjusted according to PM so that the reconstructed circuit has minimum node and mash. The proposed ICT inspection system is realized using PD and GGM. Using the system, an experiment for each passive component is done to investigate the measurement accuracy of the developed system and an experiment for real flexible PCB model is done to verity the effectiveness of the system.

Analysis of Malfunction Characteristics of High Sensitivity Type Earth Leakage Circuit Breaker for 30[A] due to Lightning Impulse Voltages (뇌임펄스전압에 대한 30[A]용 고감도형 누전 차단기의 오동작에 대한 특성의 해석)

  • 이복희;이승칠;김찬오
    • The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.11 no.6
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    • pp.96-103
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    • 1997
  • This paper deals with the malfunction characteristics of the earth leakage circuit breakers(ELBs) applied by a lightning impulse voltage. In the cases of the regulation of KS C 4613 and the simulated circuits with surge protection devices, the dead operation characteristics of the ELBs against lightning impulse voltages were experimentally investigated and discussed. As a result, all the specimens(ELBs) used in this work have a cutoff performance of the lightning impulse voltage when the differential mode surges were injected at the input terminals of the ELBs owing to a surge absorber installed at the power source side of amplification circuit. Four kinds of the specimens have brought about malfunction in the condition of the lightning impulse dead operation test defined in KS C 4613, and the malfunction voltages are relatively high and are about 5-6.5[kV]. In the case of the simulated test circuit with surge protection devicesthree kinds of the ELBs have led to malfunction. Also the voltage level causing the malfunction of the ELBs is decreased by operation of surge protection devices, and it ranges from 3 to 5(kV).

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A study on the fault analysis of CMOS logic circuit using IDDQ testing technique (IDDQ 테스트 방식을 이용한 CMOS 논리회로의 고장분석에 관한 연구)

  • Han, Seok-Bung
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.31B no.9
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    • pp.1-9
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    • 1994
  • This paper analyzes the faults and their mechanism of CMOS ICs using IDDQ testing technique and evalutes the reliability of the chips that fail this test. It is implemented by the three testing phases, initial test, burn-in and life test. Each testing phase includes the parametric test, functional test, IDDQ test and propagation delay test. It is shown that the short faults such as gate-oxide short, bridging can be only detected by IDDQ testing technique and the number of test patterns for this test technique is very few. After first burn-in, the IDDQ of some test chips is decreased, which is increased in conventional studies and in subsequent burn-in, the IDDQ of all test chips is stabilized. It is verified that the resistive short faults exist in the test chips and it is deteriorated with time and causes the logic fault. Also, the new testing technique which can easily detect the rsistive short fault is proposed.

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Virtual ground monitoring for high fault coverage of linear analog circuits

  • Roh, Jeongjin
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.2 no.3
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    • pp.226-232
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    • 2002
  • This paper explains a technique to improve the fault coverage of oscillation-test [1-5] for linear analog circuits. The transient behavior of the virtual ground is monitored during oscillation to extract information of the circuit. The limitation of the oscillation-test is analyzed, and an efficient signature analysis technique is proposed to maximize the fault coverage. The experimental result proves that the parametric fault coverage can be significantly increased by the proposed technique.

Development of High Speed Circuit Breaker using Electromagnetic Repulsion Actuator (전자기 반발 구동장치를 사용한 고속 차단기 개발)

  • Hwang, Kwang-Soo;Kim, Young-Il;Moon, Chae-Joo
    • The Journal of the Korea institute of electronic communication sciences
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    • v.17 no.3
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    • pp.441-448
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    • 2022
  • In the distribution system, there are multiple power protection systems such as circuit breakers at substations, and reclosers, minimum circuit ampacities, fault interrupters on distribution lines. They are widely used to prevent partial outages, cascading power failure or blackout so that other healthy systems could maintain the integrity in case of the instant fault or permanent failure on the power lines. However, when a fault happens, it could cause a major black out due to the lack of the protection cooperation between the protection relay of the circuit breaker at a substation and a protection system on the distribution lines. To achieve the power system integrity better, it is required to develop the circuit breaker which can be operational within 1 cycle(16ms). In this study, the high speed circuit breaker which is filled up with eco-friendly gas is developed. This equipment achieved an excellent test results based on IEC 62271-111 standard. It is respected that this equipment would contribute to prevent the wide area blackout by isolating a fault area quicker and faster.

Design and Making of PWM Control-based AC-DC Converter with Full-Bridge Rectifier (전파 정류기를 가지는 PWM 제어 기반의 AC-DC 컨버터 설계 및 제작)

  • Bum-Soo Choi;Sang-Hyeon Kim;Dong-Ki Woo;Min-Ho Lee;Yun-Seok Ko
    • The Journal of the Korea institute of electronic communication sciences
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    • v.18 no.4
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    • pp.617-624
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    • 2023
  • Recently, miniaturization and low power consumption of electronic products and improved efficiency and power factor improvement have become a matter of great interest. In this paper, an AC-DC converter based on PWM control was designed and made. The AC-DC converter is designed with a structure in which one rectifier circuit and one output voltage control circuit are connected in series. The rectifier circuit is a diode-based single phase full-wave current circuit and the output voltage control circuit is a DC-DC conversion circuit based on PWM control. Arduino was used as the main control device for PWM control, and LCD was configured at the output stage so that the control result could be checked. The error between the output voltage displayed on the oscilloscope and LCD and the target output voltage was confirmed through repeated experiments with the test circuit, and the validity of the proposed design methodology was confirmed by showing an error rate of about 5% based on the oscilloscope measurement value.

Comparison of Evaluation Methods of the Small Current Breaking Performance for $SF_{6}$ Gas Circuit Breakers

  • Song, Ki-Dong;Lee, Byeong-Yoon;Park, Kyong-Yop;Park, Jung-Hoo
    • KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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    • v.11B no.4
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    • pp.129-136
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    • 2001
  • In order to evaluate the dielectric recovery strength for GCBs, two equations have been usually utilized. One is the empirical formula obtained from a series of tests and the other is the theoretical formula obtained from the streamer theory. In this paper, both methods were applied to predict the small capacitive current interruption capability of model circuit breakers and were investigated in terms of the reliability by comparing the simulation results with test ones.

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DESIGN OF THE RLG CURRENT STABILIZER CIRCUIT FOR ATTITUDE CONTROL IN THE SATELLITE (위성 자세제어용 RLG 전류 안정화 회로 설계)

  • Kim Eui-Chan;Choi Jae-Dong
    • Journal of Astronomy and Space Sciences
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    • v.23 no.2
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    • pp.161-166
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    • 2006
  • In this paper, we describe the RLG current stabilizer circuit for attitude control in the satellite. The RLG makes use of the Sagnac effect within a resonant of a HeNe laser. The difference between two discharge currents causes one of the gyro bias errors. The theoretical background and current stabilizer are introduced. It is verified that the circuit designed is applicable to the test of input voltage and temperature.

Threshold voltage influence reduction and Wide Aperture ratio in Active Matrix Orgnic Light Emitting Diode Display (AMOLED(active matrix organic light emitting diode) 의 문턱전압 보상과 화소구조에 대한 연구)

  • 김정민;곽계달;신흥재;최성욱
    • Proceedings of the IEEK Conference
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    • 2002.06b
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    • pp.257-260
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    • 2002
  • This paper describes the pixel of AMOLED(act ive matrix organic light emitting diode) driving circuit by poly-sl technology. The area per pixel is 278um$\times$278um in 120$\times$160(2.2 inch) Driving the OLEDS with active matrix leads to the lower voltage operation, the lower peak pixel currents and the display with much greater efficiency and brightness The role of the active matrix is to provide a constant current throughout the entire frame time and is eliminating the high currents encountered In the passive matrix approach, This design can support the high resolutions expected by the consumer because the current variation specification is norestricted. The pixel has been designed driving TFT threshold voltage cancellation circuit and wide aperture ratio circuit that communizes 4 pixel. The test simulation results and layout are 11% per threshold-current var Eat ion and 12.5% the aperture ratio of increase.

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Modeling Interconnect Wiring using the Partial Element Equivalent Circuit Approach in Time Domain (부분요소 등가회로를 이용한 시간영역에서의 인터커넥트 모델링 연구)

  • Park, Seol-Cheon;Yun, Seok-In;Won, Tae-Yeong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.1
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    • pp.67-75
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    • 2002
  • In this Paper, we discuss the PEEC method and construct the PEEC equivalent circuit of the test structure and construct the system matrix, which was simulated by numerical analysis. And we got node voltages and currents. Constructing the equivalent circuit, we extracted the parasitic parameter(R, L, C)using the simulator, which is based on finite element method, hence we could simulate the transient analysis.