• Title/Summary/Keyword: in-circuit test

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Development of an Electric Pulp Tester with Constant Current Source (정 전류원을 이용한 치수 검사기의 개발)

  • 김재성;남기창;김수찬;이승종;김덕원
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.41 no.2
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    • pp.61-68
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    • 2004
  • Electric stimulation of teeth has been used for assessing pulp vitality. The principle is based upon the assumption that a subject feels the pain produced by electrical current stimulation of intradental nerve. Because of very high and wide range of impedance of the enamel, it is very difficult to determine stimulation levels regardless of teeth status. Most pulp testers adopt voltage stimulation method and thus, their stimulating threshold levels significantly depend on each individual. Therefore, a constant current stimulator is necessary to minimize the effect of wide variation due to different enamel thickness. And it is also necessary to test teeth vitality with a wide current range regardless of tooth impedance. In this study, we constructed a burst-wave type pulp tester to reduce the pain using a current stabilizing circuit with the maximum current of 150 uA.

Experimental Verification of Heat Sink for FPGA Thermal Control (FPGA 열제어용 히트싱크 효과의 실험적 검증)

  • Park, Jin-Han;Kim, Hyeon-Soo;Ko, Hyun-Suk;Jin, Bong-Cheol;Seo, Hak-Keum
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.42 no.9
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    • pp.789-794
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    • 2014
  • The FPGA is used to the high speed digital satellite communication on the Digital Signal Process Unit of the next generation GEO communication satellite. The high capacity FPGA has the high power dissipation and it is difficult to satisfy the derating requirement of temperature. This matter is the major factor to degrade the equipment life and reliability. The thermal control at the equipment level has been worked through thermal conduction in the space environment. The FPGA of CCGA or BGA package type was mounted on printed circuit board, but the PCB has low efficient to the thermal control. For the FPGA heat dissipation, the heat sink was applied between part lid and housing of equipment and the performance of heat sink was confirmed via thermal vacuum test under the condition of space qualification level. The FPGA of high power dissipation has been difficult to apply for space application, but FPGA with heat sink could be used to space application with the derating temperature margin.

Effects of Lightning Surges on the Life of ZnO Varistors (뇌서지가 ZnO바리스터에 미치는 영향)

  • Lee, Bong;Lee, Su-Bong;Kang, Sung-Man;Lee, Bok-Hee
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.55 no.5
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    • pp.257-262
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    • 2006
  • To evaluate the change in protective levels of zinc oxide (ZnO) varistors after the surge absorption, this paper investigated the effects of the number of injection and amplitude of lightning surges on the life of ZnO varistors for low voltages. Leakage currents flowing through ZnO varistors subjected to the $8/20{\mu}s$ impulse currents under 60 Hz AC voltages were measured. The surge simulator system ECAT that can generate $8/20{\mu}s$ impulse currents with a peak short-circuit of 5 $[kA_p]$ was used. The ZnO varistor leakage current increases with exposure to impulse current, and the number of injection of $8/20{\mu}s$ impulse currents to breakdown was inversely proportional to the amplitude of the test current. Behaviors of ZnO varistor leakage currents were strongly dependent on the number of injection and amplitude of $8/20{\mu}s$ impulse currents. ZnO varistors degrade gradually when subjected to impulse current, and the resistive leakage current flowing through ZnO varistors subjected to the $8/20{\mu}s$ impulse currents under 60 Hz AC voltages was significantly increased after a certain number of injection that is dependent on the amplitude of the test impulse current. As a result, the life of ZnO varistors mainly depends on the amplitude and occurrence frequency of lightning surges.

A Study on the Development and Testing of Ringer Injection IoT System (링거 주입 IoT 시스템 개발 및 시험에 관한 연구)

  • Cho, Chung-Ho
    • The Journal of the Korea institute of electronic communication sciences
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    • v.14 no.4
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    • pp.787-796
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    • 2019
  • In this paper, we propose the design and test measure of Ringer injection IoT system for controling the ringer injection status and notifying the server system of the collected status informations such as the completion of injection, the remaining liquid, the injection status, and the emergency alarming of the urgent patients. We design the circuit diagrams composed of linger injection sensors, switches, status indicators, wireless communication functionalities, and propose the controlling and monitoring algorithms for sensing the linger injection status and notifying the collected status informations to a server system. Furthermore, we derive the testing criteria, such as linger liquid sensing time, sensing distance, operating temperature, input power, power consumption, and wireless communication speed, and analyze the test results.

Effect of Shearing Speed on High Speed Shear Properties of Sn1.0Ag0.5Cu Solder Bump on Various UBM's (다양한 UBM층상의 Sn0Ag0.5Cu 솔더 범프의 고속 전단특성에 미치는 전단속도의 영향)

  • Lee, Wang-Gu;Jung, Jae Pil
    • Korean Journal of Metals and Materials
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    • v.49 no.3
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    • pp.237-242
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    • 2011
  • The effect of shearing speed on the shear force and energy of Sn-0Ag-0.5Cu solder ball was investigated. Various UBM (under bump metallurgy)'s on Cu pads were used such as ENEPIG (Electroless Nickel, Electroless Palladium, Immersion Gold; Ni/Pd/Au), ENIG (Electroless Nickel, Immersion Gold; Ni/Au), OSP (Organic Solderability Preservative). To fabricate a shear test specimen, a solder ball, $300{\mu}m$ in diameter, was soldered on a pad of FR4 PCB (printed circuit board) by a reflow soldering machine at $245^{\circ}C$. The solder bump on the PCB was shear tested by changing the shearing speed from 0.01 m/s to 3.0 m/s. As experimental results, the shear force increased with a shearing speed of up to 0.6 m/s for the ENIG and the OSP pads, and up to 0 m/s for the ENEPIG pad. The shear energy increased with a shearing speed up to 0.3 m/s for the ENIG and the OSP pads, and up to 0.6 m/s for the ENEPIG pad. With a high shear speed of over 0 m/s, the ENEPIG showed a higher shear force and energy than those of the ENIG and OSP. The fracture surfaces of the shear tested specimens were analyzed, and the fracture modes were found to have closer relationship with the shear energy than the shear force.

An Efficient Test Compression Scheme based on LFSR Reseeding (효율적인 LFSR 리시딩 기반의 테스트 압축 기법)

  • Kim, Hong-Sik;Kim, Hyun-Jin;Ahn, Jin-Ho;Kang, Sung-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.3
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    • pp.26-31
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    • 2009
  • A new LFSR based test compression scheme is proposed by reducing the maximum number of specified bits in the test cube set, smax, virtually. The performance of a conventional LFSR reseeding scheme highly depends on smax. In this paper, by using different clock frequencies between an LFSR and scan chains, and grouping the scan cells, we could reduce smax virtually. H the clock frequency which is slower than the clock frequency for the scan chain by n times is used for LFSR, successive n scan cells are filled with the same data; such that the number of specified bits can be reduced with an efficient grouping of scan cells. Since the efficiency of the proposed scheme depends on the grouping mechanism, a new graph-based scan cell grouping heuristic has been proposed. The simulation results on the largest ISCAS 89 benchmark circuit show that the proposed scheme requires less memory storage with significantly smaller area overhead compared to the previous test compression schemes.

Low-power FFT/IFFT Processor for Wireless LAN Modem (무선 랜 모뎀용 저전력 FFT/IFFT프로세서 설계)

  • Shin Kyung-Wook
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.11A
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    • pp.1263-1270
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    • 2004
  • A low-power 64-point FFT/IFFT processor core is designed, which is an essential block in OFDM-based wireless LAM modems. The radix-2/418 DIF (Decimation-ln-Frequency) FFT algorithm is implemented using R2SDF (Radix-2 Single-path Delay Feedback) structure. Some design techniques for low-power implementation are considered from algorithm level to circuit level. Based on the analysis on infernal data flow, some unnecessary switching activities have been eliminated to minimize power dissipation. In circuit level, constant multipliers and complex-number multiplier in data-path are designed using truncation structure to reduce gate counts and power dissipation. The 64-point FFT/IFFT core designed in Verilog-HDL has about 28,100 gates, and timing simulation results using gate-level netlist with extracted SDF data show that it can safely operate up to 50-MHz@2.5-V, resulting that a 64-point FFT/IFFT can be computed every 1.3-${\mu}\textrm{s}$. The functionality of the core was fully verified by FPGA implementation using various test vectors. The average SQNR of over 50-dB is achieved, and the average power consumption is about 69.3-mW with 50-MHz@2.5-V.

Characteristics of OCP of Reinforced Concrete Using Socket-type Electrodes during Periodic Salt Damage Test (주기적 염해 시험에 따른 소켓 타입 전극을 활용한 철근 콘크리트의 OCP 특성)

  • Lee, Sang-Seok;Kwon, Seung-Jun
    • Journal of the Korea institute for structural maintenance and inspection
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    • v.25 no.4
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    • pp.28-36
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    • 2021
  • It is known that buried rebars inside concrete structures are protected from corrosion due to passive layer. It is very important to delay the timing of corrosion or evaluate a detection of corrosion initiation for the purpose of cost-beneficiary service life of a structure. In this study, corrosion monitoring was performed on concrete specimens considering 3 levels of cover depth(60 mm, 45 mm, and 30 mm), W/C(water to cement) ratio(40.0%, 50.0%, and 60.0%) and chloride concentration(0.0%, 3.5%, and 7.0%). OCP(Open Circuit Potential) was measured using agar-based socket type sensors. The OCP measurement showed the consistent behavior where the potential was reduced in wet conditions and it was partially recovered in dry conditions. In the case of 30 mm of cover depth for most W/C ratio cases, the lowest OCP value was measured and rapid OCP recovery was evaluated in increasing cover depth from 30 mm to 45 mm, since cover depth was an effective protection against chloride ion ingress. As the chloride concentration increased, the effect on the cover depth tended to be more dominant than the that of W/C ratio. After additional monitoring and physical evaluation of chloride concentration after specimen dismantling, the proposed system can be improved with increasing reliability of the corrosion monitoring.

Correlations of Cerebellar Function with Psychotic Symptoms and Cognitive Function in Schizophrenic Patients (남자 정신분열병 환자의 소뇌기능과 정신증상 및 인지기능간의 연관성)

  • Kim, Seo Young;Jun, Yong Ho;Kwon, Young Joon;Jeong, Hee Yeon;Hwang, Bo Young;Shim, Se Hoon
    • Korean Journal of Biological Psychiatry
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    • v.14 no.3
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    • pp.184-193
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    • 2007
  • Objectives:There is increasing evidence that the cerebellum plays an important role in cognition and psychiatric symptoms as well as motor coordination. The concept of cognitive dysmetria has been making cerebellar function in schizophrenia the focus of current studies. In other words, disruption in the corticocerebellum-thalamic -cortical circuit could lead to disordered cognition and clinical symptoms of schizophrenia. The purposes of this study were to determine cerebellar dysfunction in male schizophrenic patients semiquantitatively with ICARS and to investigate the clinical and cognitive correlates of ICARS in patients. Methods:We compared the scores of cerebellar neurologic sign using ICARS in 47 male patients with a DSM-IV-TR diagnosis of schizophrenia with 30 gender and age-matched healthy control subjects. The semiquantitative 100-point ICARS consists of 19 items divided into 4 unequally weighted subscores:posture and gait disturbances, kinetic functions, speech disorders and oculomotor disorders. All subjects were also assessed with cognitive function test. Cognitive functions were evaluated by Korean-Mini Mental Status Examination (K-MMSE), Verbal fluency test, and Clock drawing test. The patients were administered Korea version of Positive and Negative Symptom Scale(K-PANSS) to assess the symptom severity. Results:Schizophrenic patients had significantly higher scores on the ICARS than control subjects with posture and gait disturbances, kinetic functions, and oculomotor disorders. They also showed more significant impairments in cognitive function tests than control subjects. There was a significant correlation between ICARS and negative symptoms of patients. In cognitive function test, Clock drawing test was significantly associated with negative symptoms. In addition, Clock drawing test was negatively correlated with the total score of ICARS. Conclusion:In this study, we confirmed that schizophrenic patients have significant impairments in cognitive and cerebellar function, and that those were related with negative symptoms of schizophrenic patients. These results support a role of the cerebellum in schizophrenia. It is meaningful that we used a structured, and reliable procedure for rating neurological soft signs, ICARS. We hope that future prospective studies using a similar design help that rate of neurological sign should have been visible with the progression of illness.

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Design of 256Kb EEPROM IP Aimed at Battery Applications (배터리 응용을 위한 1.5V 단일전원 256Kb EEPROM IP 설계)

  • Kim, Young-Hee;Jin, RiJun;Ha, Pan-Bong
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.10 no.6
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    • pp.558-569
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    • 2017
  • In this paper, a 256Kb EEPROM IP aimed at battery applications using a single supply of 1.5V which is embedded into an MCU is designed. In the conventional cross-coupled VPP (boosted voltage) charge pump using a body-potential biasing circuit, cross-coupled PMOS devices of 5V in it can be broken by the junction or gate oxide breakdown due to a high voltage of 8.53V applied to them in exiting the program or erase mode. Since each pumping node is precharged to the input voltage of the pumping stage at the same time that the output node is precharged to VDD in the cross-coupled charge pump, a high voltage of above 5.5V is prevented from being applied to them and thus the breakdown does not occur. Also, all erase, even program, odd program, and all program modes are supported to reduce the times of erasing and programming 256 kilo bits of cells. Furthermore, disturbance test time is also reduced since disturbance is applied to all the 256 kilo bits of EEPROM cells at once in the cell disturb test modes to reduce the cell disturbance testing time. Lastly, a CG driver with a short disable time to meet the cycle time of 40ns in the erase-verify-read mode is newly proposed.