• Title/Summary/Keyword: in-circuit test

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Damage Pattern and Operation Characteristics of a Thermal Magnetic Type MCCB according to Thermal Stress (열동전자식 MCCB의 열적 스트레스에 따른 소손 패턴 및 작동 특성)

  • Lee, Jae-Hyuk;Choi, Chung-Seog
    • Journal of the Korean Society of Safety
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    • v.28 no.3
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    • pp.69-73
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    • 2013
  • The purpose of this paper is to analyze the carbonization pattern and operation characteristics of an MCCB. The MCCB is consisted of the actuator lever, actuator mechanism, bimetallic strip, contacts, up and down operator, arc divider or extinguisher, metal operation pin, terminal part, etc. When the actuator lever of the MCCB is at the top or the internal metal operation pin is in contact with the front part, the MCCB is turned on or off. It means trip state if the actuator lever or the internal metal operation pin moves to back side. In the UL 94 vertical combustion test, white smoke occurred from the MCCB when an average of 17~24 seconds elapsed after the MCCB was ignited and black smoke occurred when an average of 45~50 seconds elapsed. It took 5~6 minutes for the MCCB surface to be half burnt and took an average of 8~9 minutes for the MCCB surface to be entirely burnt. In the UL 94 test, the MCCB trip device operated when an average 7~8 minutes elapsed. If the MCCB trip has occurred, it may have been caused by an electrical problem such as a short-circuit, overcurrent, etc., as well as fire heat. From the entire part combustion test according to KS C 3004, it was found that the metal operation pin could be moved to the MCCB trip position without any electrical problems.

Formation Mechanisms of Sn Oxide Films on Probe Pins Contacted with Pb-Free Solder Bumps (무연솔더 범프 접촉 탐침 핀의 Sn 산화막 형성 기제)

  • Bae, Kyoo-Sik
    • Korean Journal of Materials Research
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    • v.22 no.10
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    • pp.545-551
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    • 2012
  • In semiconductor manufacturing, the circuit integrity of packaged BGA devices is tested by measuring electrical resistance using test sockets. Test sockets have been reported to often fail earlier than the expected life-time due to high contact resistance. This has been attributed to the formation of Sn oxide films on the Au coating layer of the probe pins loaded on the socket. Similar to contact failure, and known as "fretting", this process widely occurs between two conductive surfaces due to the continual rupture and accumulation of oxide films. However, the failure mechanism at the probe pin differs from fretting. In this study, the microstructural processes and formation mechanisms of Sn oxide films developed on the probe pin surface were investigated. Failure analysis was conducted mainly by FIB-FESEM observations, along with EDX, AES, and XRD analyses. Soft and fresh Sn was found to be transferred repeatedly from the solder bump to the Au surface of the probe pins; it was then instantly oxidized to SnO. The $SnO_2$ phase is a more stable natural oxide, but SnO has been proved to grow on Sn thin film at low temperature (< $150^{\circ}C$). Further oxidation to $SnO_2$ is thought to be limited to 30%. The SnO film grew layer by layer up to 571 nm after testing of 50,500 cycles (1 nm/100 cycle). This resulted in the increase of contact resistance and thus of signal delay between the probe pin and the solder bump.

Wastewater Recycling from Electroless Printed Circuit Board Plating Process Using Membranes (분리막을 이용한 무전해 PCB 도금 폐수의 재활용)

  • 이동훈;김래현;정건용
    • Membrane Journal
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    • v.13 no.1
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    • pp.9-19
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    • 2003
  • Membrane process was investigated to recover process water and valuable gold from washing water of electroless PCB plating processes. The filtration experiments were carried out using not only a RO membrane test cell to determine suitable membrane for washing water but also spiral wound membrane modules of nanofiltration and reverse osmosis for scale-up. At first, RO-TL(tap water, low pressure), RO-BL(brackish water, low pressure) and RO-normal(for water purifier) sheet membranes made by Saehan Co. were tested, and the performance of RO-TL membrane showed most suitable f3r recovery of soft etching, catalyst and Ni washing waters. As a result of RO test cell, the experiments for scale-up were carried out using RO-TL modules far water purifier at 7bar and $25^{\circ}C $The permeate flux fur Au washing water was about 30 LMH, but Au rejection was less than 80%. The permeate fluxes for Pd, Ni and soft etching washing water were about 22, 17 and 10 LMH, respectively. The Pd, Ni and Cu rejections showed more than 85, 97 and 98% respectively. The nanofiltration module for water purifier was introduced to recover Au selectively from Au, Ni and Cu ions in Au washing water. Most of Ni and Cu ions in the feed washing water were removed, and only Au ion was existed 81.9% in the permeate. Furthermore, Au ion in the permeate was concentrated and recovered by RO-TL membrane module. Finally, Au was also able to recover effectively by using 4 inch diameter spiral wound modules of NF and RO-TL membranes, in series.

The Effect of the Instruction Using PSpice Simulation in 'Digital Logic Circuit' Subject at Industrial High School (공업계열 전문계고등학교 '디지털 논리 회로' 수업에서 PSpice를 이용한 수업의 효과)

  • Choi, Seung-Woo;Woo, Sang-Ho;Kim, Jinsoo
    • 대한공업교육학회지
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    • v.33 no.1
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    • pp.149-168
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    • 2008
  • The purpose of this study is to verify the effect of PSpice instruction on academic achievement in 'Combination logic circuit' unit of 'Digital Logic Circuit' in industrial high school. Three kinds of null hypotheses were formulated. Two classes of the third grade of C technical high school in Gyeong-buk were divided into experimental group and control group in order to verify null hypotheses. In the experimental design, 'Non-equivalent control group pretest-posttest' model was utilized. This experiment was conducted for six classes, the experimental group was applied to PSpice instruction method before the circuit traning while the control group was applied to traditional lecture oriented method before the circuit traning. Window SPSS 10.0 korean language version program was used for the data analysis and independent sample t-test was used to identify the average of each group. Significance level was set to .05 level. The results obtained in this study were as follows; First, PSpice instruction had not an effect on academic achievement according to a group type. However, these instruction had an effect on the following sub-domains; the psychomotor domain. Second, PSpice instruction had not an effect on academic achievement according to a studies level. However, these instruction for middle and low level students had an effect on the cognitive and psychomotor domain, and for middle level students had an effect on the affective domain. Third, PSpice instruction had not an effect on shortening of a training requirement. However, this instruction for low level students had an effect on shortening of a training requirement. The study results of simulation instruction was chiefly efficient in the psychomotor domain. We could know that simulation instruction is efficient as went to a low level students than an upper level students. Thus, We may make the study effectiveness in various instruction method.

Automatic On-Chip Glitch-Free Backup Clock Changing Method for MCU Clock Failure Protection in Unsafe I/O Pin Noisy Environment (안전하지 않은 I/O핀 노이즈 환경에서 MCU 클럭 보호를 위한 자동 온칩 글리치 프리 백업 클럭 변환 기법)

  • An, Joonghyun;Youn, Jiae;Cho, Jeonghun;Park, Daejin
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.12
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    • pp.99-108
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    • 2015
  • The embedded microcontroller which is operated by the logic gates synchronized on the clock pulse, is gradually used as main controller of mission-critical systems. Severe electrical situations such as high voltage/frequency surge may cause malfunctioning of the clock source. The tolerant system operation is required against the various external electric noise and means the robust design technique is becoming more important issue in system clock failure problems. In this paper, we propose on-chip backup clock change architecture for the automatic clock failure detection. For the this, we adopt the edge detector, noise canceller logic and glitch-free clock changer circuit. The implemented edge detector unit detects the abnormal low-frequency of the clock source and the delay chain circuit of the clock pulse by the noise canceller can cancel out the glitch clock. The externally invalid clock source by detecting the emergency status will be switched to back-up clock source by glitch-free clock changer circuit. The proposed circuits are evaluated by Verilog simulation and the fabricated IC is validated by using test equipment electrical field radiation noise

Improved Design of Hydraulic Circuit of Front-end Loader for Bump Shock Reduction of an Agricultural Tractor (농업용 트랙터의 프론트 로더 충격 저감을 위한 유압 회로의 설계 개선)

  • Cho, Bong Jin;Ahn, Seong Wook;Lee, Chang Joo;Yoon, Young Hwan;Lee, Soo Seong;Kim, Hak Jin
    • Journal of Drive and Control
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    • v.13 no.2
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    • pp.10-18
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    • 2016
  • A front-end loader (FEL) mounted on an agricultural tractor is one of the most commonly used implements to mechanize routine agricultural tasks. When the FEL is used with a loaded bucket, careful operation is required to maintain safety and avoid spillage when the tractor passes a bump because a change in the gravity center of the tractor due to varied loadings can affect the stability of the tractor. Use of a boom suspension system consisting of accumulators and orifice dampers can be instrumental in reducing pitching vibrations while increasing the handling performance of the FEL-mounted tractor. The objective of this research was to reduce bump shocks by adding an orifice and a flow control valve to the original hydraulic circuit composed solely of accumulators. A simulation study was performed using the SimulationX program to investigate the effects of an accumulator and an orifice-throttle damper on bump shocks. Results showed that the peak pressure on a boom cylinder and the vertical acceleration of a bucket were significantly affected by use of both an accumulator and an orifice damper. In a field test conducted with a 75-kW tractor, the peak pressure of the boom cylinder, and the root mean square (RMS) vertical acceleration of the bucket and seat were reduced by on average, 23.0, 42.2, and 44.9% respectively, as compared to those measured with the original accumulator system, showing that an improved design for the accumulator hydraulic circuit can reduce bump shocks. Further studies are needed to design a tractor suspension system that includes the effects of cabin suspension and tires as well as dynamic analysis.

DEVELOPMENT OF A FLUXGATE MAGNETOMETER FOR THE KITSAT-3 SATELLITE (과학위성용 자력계 탑재체 개발에 관한 연구)

  • ;;;;;;Onishi Nobugito
    • Journal of Astronomy and Space Sciences
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    • v.14 no.2
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    • pp.312-319
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    • 1997
  • The magnetometer is one of the most important payloads for scientific satellite to monitor the near-earth space environment. The electromagnetic variations of the space environment can be observed with the electric and magnetic field measurements. In practice, it is well known that the measurement of magnetic fields needs less technical complexities than that of electric fields in space. Therefore the magnetometer has long been recognized as one of the basic payloads for the scientific satellites. In this paper, we discuss the scientific fluxgate magnetometer which will be on board the KITSAT-3. The main circuit design of the present magnetometer is based on that of KITSAT-1 and -2 but its facilities have been re-designed to improve the resolution to about 5nT for scientific purpose. The calibration and noise level test of this circuit have been performed at the laboratory of the Tierra Tecnica company in Japan.

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Artificial Accelerated Weathering of Volcanic Rocks from Ulleungdo Island (인공풍화가속실험을 통한 울릉도에 분포하는 화산암의 풍화특성 고찰)

  • Woo, Ik
    • The Journal of Engineering Geology
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    • v.25 no.4
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    • pp.499-510
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    • 2015
  • Artificial accelerated weathering test evaluated rocks from near the circuit road of Ulleungdo island, approximately 120 km from east of the Korean Peninsula. The tests subjected rock specimens to conditions based on the climate of the island. The specimens (such as basaltic breccia, trachyte, volcanic breccia) were preliminarily classified using a TAS diagram (XRF data) and based on the constituent minerals (XRD data); they were further classified by weathering degree according to their absorption ratios. During the artificial accelerated weathering, the absorption ratio of most of the specimens increased, but the point-load strength did not decrease in most cases, except for the volcanic breccia. The greater initial absorption ratio of trachyte rock specimen in comparison with the other specimens led to a greater increase of its absorption ratio during the artificial accelerated weathering test. The volcanic breccia specimens showed the greatest increase of absorption ratio and the biggest reduction ratio of the point- load strength during the tests. These results could aid prediction of the weathering rate of rocks in Ulleungdo island subjected to weathering processes; trachyte which appears to accelerate with time, and volcanic breccia whose mechanical strength can largely decrease in a relative short period of time. Proper measures therefore appear necessary for the prevention of natural disaster such as rock fall and landslide around the circuit road.

Design and Fabrication of Ka-Band Active PIN Diode Limiter for a Millimeter Wave Seeker (밀리미터파 탐색기용 Ka 대역 능동 PIN 다이오드 리미터 설계 및 제작)

  • Yang, Seong-Sik;Lim, Ju-Hyun;Na, Young-Jin
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.23 no.2
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    • pp.220-228
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    • 2012
  • In this paper, we explained the design technique about Ka-band active limiter for protecting the receiver of a millimeter wave seeker. To implement low flat leakage power, we proposed the control circuit of active limiter to control limiter voltage with PRF(Pulse Repetition Frequency) signal and input power. This active limiter consisted of the conventional 2 stage passive limiter, a feedback circuit with a directional coupler, detector, non-inverting amplifier and over-current protection resistance. As the test result of the fabricated Ka-band limiter, it had 1 GHz bandwidth, 3.5 dB insertion loss at the small input power and -7.5 dBm flat leakage at the 4 W RF input power, respectively.

Design of L-Band High Speed Pulsed High Power Amplifier Using LDMOS FET (LDMOS FET를 이용한 L-대역 고속 펄스 고전력 증폭기 설계)

  • Yi, Hui-Min;Hong, Sung-Yong
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.19 no.4
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    • pp.484-491
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    • 2008
  • In this paper, we design and fabricate the L-band high speed pulsed HPA using LDMOS FET. And we propose the high voltage and high speed switching circuit for LDMOS FET. The pulsed HPA using LDMOS FET is simpler than using GaAs FET because it has a high gain, high output power and sin81e voltage supply. LDMOS FET is suitable for pulsed HPA using switching method because it has $2{\sim}3$ times higher maximum drain-source voltage(65 V) than operating drain-source voltage($V_{ds}=26{\sim}28\;V$). As results of test, the output peak power is 100 W at 1.2 GHz, the rise/fall time of output RF pulse are 28.1 ns/26.6 ns at 2 us pulse width with 40 kHz PRF, respectively.