• Title/Summary/Keyword: implementation algorithm

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Multi-Objective Pareto Optimization of Parallel Synthesis of Embedded Computer Systems

  • Drabowski, Mieczyslaw
    • International Journal of Computer Science & Network Security
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    • v.21 no.3
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    • pp.304-310
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    • 2021
  • The paper presents problems of optimization of the synthesis of embedded systems, in particular Pareto optimization. The model of such a system for its design for high-level of abstract is based on the classic approach known from the theory of task scheduling, but it is significantly extended, among others, by the characteristics of tasks and resources as well as additional criteria of optimal system in scope structure and operation. The metaheuristic algorithm operating according to this model introduces a new approach to system synthesis, in which parallelism of task scheduling and resources partition is applied. An algorithm based on a genetic approach with simulated annealing and Boltzmann tournaments, avoids local minima and generates optimized solutions. Such a synthesis is based on the implementation of task scheduling, resources identification and partition, allocation of tasks and resources and ultimately on the optimization of the designed system in accordance with the optimization criteria regarding cost of implementation, execution speed of processes and energy consumption by the system during operation. This paper presents examples and results for multi-criteria optimization, based on calculations for specifying non-dominated solutions and indicating a subset of Pareto solutions in the space of all solutions.

Evolutionary Computing Driven Extreme Learning Machine for Objected Oriented Software Aging Prediction

  • Ahamad, Shahanawaj
    • International Journal of Computer Science & Network Security
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    • v.22 no.2
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    • pp.232-240
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    • 2022
  • To fulfill user expectations, the rapid evolution of software techniques and approaches has necessitated reliable and flawless software operations. Aging prediction in the software under operation is becoming a basic and unavoidable requirement for ensuring the systems' availability, reliability, and operations. In this paper, an improved evolutionary computing-driven extreme learning scheme (ECD-ELM) has been suggested for object-oriented software aging prediction. To perform aging prediction, we employed a variety of metrics, including program size, McCube complexity metrics, Halstead metrics, runtime failure event metrics, and some unique aging-related metrics (ARM). In our suggested paradigm, extracting OOP software metrics is done after pre-processing, which includes outlier detection and normalization. This technique improved our proposed system's ability to deal with instances with unbalanced biases and metrics. Further, different dimensional reduction and feature selection algorithms such as principal component analysis (PCA), linear discriminant analysis (LDA), and T-Test analysis have been applied. We have suggested a single hidden layer multi-feed forward neural network (SL-MFNN) based ELM, where an adaptive genetic algorithm (AGA) has been applied to estimate the weight and bias parameters for ELM learning. Unlike the traditional neural networks model, the implementation of GA-based ELM with LDA feature selection has outperformed other aging prediction approaches in terms of prediction accuracy, precision, recall, and F-measure. The results affirm that the implementation of outlier detection, normalization of imbalanced metrics, LDA-based feature selection, and GA-based ELM can be the reliable solution for object-oriented software aging prediction.

Implementation of monitoring system for availability of Hyperledger Indy (Hyperledger Indy의 가용성을 위한 모니터링 시스템 구현)

  • Gyu Hyun Choi;Geun Hyung Kim
    • Smart Media Journal
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    • v.12 no.3
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    • pp.60-67
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    • 2023
  • Hyperledger Indy is an open-source implementation of DID, a decentralized identity verification technology. Hyperledger Indy uses the RBFT consensus algorithm, and if there is a lack of consensus with more than a certain number of problem nodes in the pool, data is not added. This problem can be prevented in advance by adding a node, and a node monitoring system was implemented to operate automatically. The node monitoring system continuously checks the status of the pool and automatically adds nodes when there are more than a certain number of problematic nodes to prevent consensus problems from occurring. This proposed method can increase the availability of Hyperledger Indy and is a study that can be referenced in various blockchain services that use consensus algorithms.

A VISION SYSTEM IN ROBOTIC WELDING

  • Absi Alfaro, S. C.
    • Proceedings of the KWS Conference
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    • 2002.10a
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    • pp.314-319
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    • 2002
  • The Automation and Control Group at the University of Brasilia is developing an automatic welding station based on an industrial robot and a controllable welding machine. Several techniques were applied in order to improve the quality of the welding joints. This paper deals with the implementation of a laser-based computer vision system to guide the robotic manipulator during the welding process. Currently the robot is taught to follow a prescribed trajectory which is recorded a repeated over and over relying on the repeatability specification from the robot manufacturer. The objective of the computer vision system is monitoring the actual trajectory followed by the welding torch and to evaluate deviations from the desired trajectory. The position errors then being transfer to a control algorithm in order to actuate the robotic manipulator and cancel the trajectory errors. The computer vision systems consists of a CCD camera attached to the welding torch, a laser emitting diode circuit, a PC computer-based frame grabber card, and a computer vision algorithm. The laser circuit establishes a sharp luminous reference line which images are captured through the video camera. The raw image data is then digitized and stored in the frame grabber card for further processing using specifically written algorithms. These image-processing algorithms give the actual welding path, the relative position between the pieces and the required corrections. Two case studies are considered: the first is the joining of two flat metal pieces; and the second is concerned with joining a cylindrical-shape piece to a flat surface. An implementation of this computer vision system using parallel computer processing is being studied.

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A Study on the Implementation of Crawling Robot using Q-Learning

  • Hyunki KIM;Kyung-A KIM;Myung-Ae CHUNG;Min-Soo KANG
    • Korean Journal of Artificial Intelligence
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    • v.11 no.4
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    • pp.15-20
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    • 2023
  • Machine learning is comprised of supervised learning, unsupervised learning and reinforcement learning as the type of data and processing mechanism. In this paper, as input and output are unclear and it is difficult to apply the concrete modeling mathematically, reinforcement learning method are applied for crawling robot in this paper. Especially, Q-Learning is the most effective learning technique in model free reinforcement learning. This paper presents a method to implement a crawling robot that is operated by finding the most optimal crawling method through trial and error in a dynamic environment using a Q-learning algorithm. The goal is to perform reinforcement learning to find the optimal two motor angle for the best performance, and finally to maintain the most mature and stable motion about EV3 Crawling robot. In this paper, for the production of the crawling robot, it was produced using Lego Mindstorms with two motors, an ultrasonic sensor, a brick and switches, and EV3 Classroom SW are used for this implementation. By repeating 3 times learning, total 60 data are acquired, and two motor angles vs. crawling distance graph are plotted for the more understanding. Applying the Q-learning reinforcement learning algorithm, it was confirmed that the crawling robot found the optimal motor angle and operated with trained learning, and learn to know the direction for the future research.

An Efficient OCT Architecture for Image Compression Applications (영상 압축 응용분야를 위한 DCT 아키텍처 개발)

  • Yu, Sung-Wook
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.57 no.6
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    • pp.1069-1074
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    • 2008
  • This paper presents an efficient architecture for $2^n$-point DCT algorithm. The proposed approach makes use of the fact that, in most DCT applications, the scaling operation in the DCT unit can be eliminated and combined with the scaling operation in the quantizer unit. This important property is efficiently exploited with the CORDIC(COordinate Rotation DIgital Computer) algorithm to produce a regular architecture suitable for VLSI implementation. Although there have been several attempts to exploit CORDIC algorithm in developing DCT architectures, the proposed approach provides the most efficient way for scaled DCT applications by completely eliminating the scale factor compensation.

Extraction of Lane-Reined Information Based on an EDF and Hough Transform (EDF와 하프변환 기반의 차선관련 정보 검출)

  • Lee Joonwoong;Lee Kiyong
    • Transactions of the Korean Society of Automotive Engineers
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    • v.13 no.3
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    • pp.48-57
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    • 2005
  • This paper presents a novel algorithm in order to extract lane-related information based on machine vision techniques. The algorithm makes up for the weak points of the former method, the Edge Distribution Function(EDF)-based approach, by introducing a Lane Boundary Pixel Extractor (LBPE) and the well-known Hough Transform(HT). The LBPE that serves as a filter to extract pixels expected to be on lane boundaries enhances the robustness of machine vision, and provides its results to the HT implementation and EDF construction. The HT forms the accumulator arrays and extracts the lane-related parameters composed of orientation and distance. Furthermore, as the histogram of edge magnitude with respect to edge orientation angle, the EDF has peaks at the orientations corresponding to lane slopes on the perspective image domain. Therefore, by fusing the results from the EDF and the HT the proposed algorithm improves the confidence of the extracted lane-related information. The system shows successful results under various degrees of illumination.

Performance of M-ary QAM demapper with Max-Log-MAP (Max-Log-MAP 방식을 이용한 M-ary QAM Demapper의 성능)

  • Lee Sang-Keun;Lee Yun-Hyun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.1
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    • pp.36-41
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    • 2006
  • In this paper, we present the performance of iterative decoding with a Turbo decoder and a M-ary QAM(Quadrature Amplitude Modulation) demapper. The demappers are designed with Max-Log-MAP algorithm and it's approximated one. In addition, we provide implementing block for the approximated algorithm. From the results of computer simulations, the approximated algorithm of the Max-Log-MAP has little bit worse than the Max-Log-MAP but suggests low complexity for practical implementation.

Implementation of Parallel Processing Based Pedestrian Detection Using a Modified CENTRIST Algorithm (개선된 CENTRIST 알고리즘을 적용한 병렬처리 기반 보행자 인식 구현)

  • Jung, Jun-Mo
    • Journal of IKEEE
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    • v.18 no.3
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    • pp.398-402
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    • 2014
  • In this paper, we propose a parallel processing method of pedestrian detection algorithm based on ROI-CENTRIST. There is a difficulty in the real-time processing of pedestrian detection in the embedded environment, using the conventional pedestrian detection method. This problem can be solved by a parallel processing method of applying the ROI to the conventional algorithm. The proposed parallel processing method of pedestrian detection using ROI-CENTRIST show the result of 5.2 frames per second, which is about 10% improvement over the conventional pedestrian detection method based on CENTRIST.

Comparative Performance Analysis of High Speed Low Power Area Efficient FIR Adaptive Filter

  • Jaiswal, Manish
    • IEIE Transactions on Smart Processing and Computing
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    • v.3 no.5
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    • pp.267-270
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    • 2014
  • This paper presents the comparative performance of an adaptive FIR filter for a Delayed LMS algorithm. The delayed error signal was used to obtain a Delayed LMS algorithm to allow efficient pipelining for achieving a small critical path and area efficient implementation. This paper presents hardware efficient results (device utilization parameters) and power consumed. The FPGA families (Artix-7, Virtex-7, and Kintex-7) for a low voltage perspective are shown. The synthesis results showed that the artix-7 CMOS family achieves the lowest power consumption of 1.118 mW with 83.18 % device utilization. Different Precision strategies, such as the speed optimization and power optimization, were imposed to achieve these results. The algorithm was implemented using MATLAB (2013b) and synthesized on the Leonardo spectrum.