• Journal of IKEEE
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• v.20 no.4
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• pp.398-411
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• 2016

SVM, a machine learning method, is widely used in image processing for it's excellent generalization performance. However, to add other data to the pre-trained data of the system, we need to train the entire system again. This procedure takes a lot of time, especially in embedded environment, and results in low performance of SVM. In this paper, we implemented an SVM trainer and classifier in an FPGA to solve this problem. We parlallelized the repeated operations inside SVM and modified the exponential operations of the kernel function to perform fixed point modelling. We implemented the proposed hardware on Xilinx ZC 706 evaluation board and used TSR algorithm to verify the FPGA result. It takes about 5 seconds for the proposed hardware to train 2,000 data samples and 16.54ms for classification for $1360{\times}800$ resolution in 100MHz frequency, respectively.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.8 no.6
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• pp.121-130
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• 2009

In this paper, Gaussian probability distribution model based multi-sensor data fusion algorithm is proposed for a vehicular location awareness system. Conventional vehicular location awareness systems are operated by GPS (Global Positioning System). However, the conventional system is not working in the indoor of building or urban area where the receiver is difficult to receive the signal from satellites. A method which is combined GPS and UWB (Ultra Wide-Band) has developed to improve this problem. However, vehicular is difficult to receive seamless location information since the measurement systems by both GPS and UWB convert the vehicle's movement information separately at each sensor. In this paper, normalized probability distribution model based Hybrid UWB/GPS is proposed by utilizing GPS location data and UWB sensor data. Therefore the proposed system provides information with seamless and location flexible properties. The proposed system tested by Ubisense and Asen GPS in the $12m{\times}8m$ outdoor environments. As a result, the proposed system has improved performance for accurateness and connection ability between devices to support various CNS (Car Navigation System).

• Journal of the Korea Society of Computer and Information
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• v.10 no.5 s.37
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• pp.33-40
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• 2005

Recently So far Many low-cost mobile machinery have been produced. Those are being used for study and business. But those are some weak Points which are small-capacity storage and quite low-speed system. If we use general database programs or key-searching algorithm, It could decrease in performance of system. To solve those Problems, we applied CBDS(Compact Binary Digital Search) trie to mobile environment. As a result we could accomplish our goal which are quick searching and low-capacity indexing. We compared with some Java classes such as TreeSet to evaluation. As a result, the velocity of searching was a little slow than B-tree based TreeSet. But the storage space have been decreased by 29 percent. So I think that it would be practical use.

• The Journal of the Korea institute of electronic communication sciences
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• v.10 no.6
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• pp.749-756
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• 2015

In this paper, we propose a unique systolic structure and communication algorithm that maintains a solid link between nodes using synchronous digital communication and enables low power communication. This system was designed by using CC2500 RF transceiver, CC2590 RF front end and C8051F330 low power microcontroller. The measurement of power consumption in the network link shows below $400{\mu}W$ in data transfer rate 320bps. The system constitutes the base unit of low power wireless network that was composed of each seven link nodes having eight sensor nodes. Results of the experiments show that link nodes using a 4Ah battery could operate over 3 years without replacement.

• Journal of the Korea Computer Graphics Society
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• v.23 no.3
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• pp.19-29
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• 2017

When a fixed-sized memory allocation method is used for sparse volume data, a considerable memory space is in general wasted, which becomes more serious for a large volume of high resolution. In this paper, in order to reduce such unnecessary memory consumption, we propose a volume representation method to store mostly voxels that represent valid information rather than all voxels in a fixed volume space. Then our method is compared with the conventional static memory allocation method, an octree-based representation, and a voxel hashing method in terms of memory usage and computation speed. In particular, we compare the proposed method and the voxel hashing method with respect to implementation of the GPU-based Marching Cubes algorithm.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.3A
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• pp.180-187
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• 2002

The decoding method using covering polynomials is an extended form of error-trapping decoding, and is a simple and effective means to implement decoders for cyclic codes. Covering polynomials can be used for soft-decision decoding as well as for decoding beyond the bounded distance of the code. The implementation complexity is proportional to the number of covering polynomials employed. In this paper, the soft-decision decoding procedure using covering polynomials is described, and the procedure is applied to the [23,12] Golay code. A new set of covering polynomials is derived for the procedure, which is presented as a generalized closed-form solution. The set can be efficiently utilized for decoding a class of cyclic codes including the Golay code. Computer simulation of the described procedure is performed to show the trade-offs between the decoder performance and complexity. It is demonstrated that soft-decision decoding of the Golay code using the derived set of covering polynomials has less than 0.2dB deviation from the optimal performance of maximum-likelihood decoding, with a reduced complexity when compared to the Chase Algorithm 2 combined with hard-decision decoding that has nearly identical performance.

• International journal of advanced smart convergence
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• v.6 no.1
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• pp.82-88
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• 2017

Emergency lights and exit signs are an indispensable part of safety precautions for effective evacuation in case of emergency in public buildings. These emergency sign indicates safe escape routes and emergency doors, using an internationally recognizable sign. However visibility of those signs drops drastically in case of emergency situations like fire smoke, etc. and loss of visibility causes serious problems for safety evacuation. This paper propose a novel emergency light and exit sign built-in with Bluetooth Low Energy (BLE) Beacon to assist the emergency self-guiding evacuation using devices for crisis and emergency management to avoid panic condition inside the buildings. In this approach, the emergency light and exit sign with the BLE beacons deployed in the indoor environments and the smart devices detect their indoor positions, direction to move, and next exit sign position from beacon messages and interact with map server in the Internet / Intranet over the available LTE and/or Wi-Fi network connectivity. The map server generate an optimal emergency exit path according to the nearest emergency exit based on a novel graph generation method for less route computation for each smart device. All emergency exit path data interfaces among three system components, the emergency exit signs, map server, and smart devices, have been defined for modular implementation of our emergency evacuation system. The proposed exit sign experimental system has been deployed and evaluated in real-time building environment thoroughly and gives a good evidence that the modular design of the proposed exit sign system and a novel approach to compute emergency exit path route based on the BLE beacon message, map server, and smart devices is competitive and viable.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.43 no.3 s.309
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• pp.92-99
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• 2006

In this paper, a low-power deblocking filter structure for H.264 video coding algorithm is proposed. By sharing addition hardware for common filter coefficients, we have designed an efficient deblocking filter structure. Proposed deblocking filter utilizes MUX and DEMUX circuits for input data sharing and shows 44.2% reduction for add operation. In the HDL coding simulation and FPGA implementation, we achieved 19.5% and 19.4% gate count reduction, respectively, comparison with the conventional deblocking filter structure. Due to its efficient processing scheme, the proposed structure can be widely used in H.264 encoding and decoding SoC.

• Journal of The Korean Association of Information Education
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• v.14 no.4
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• pp.527-536
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• 2010

Ubiquitous computing and mobile technologies provide much scope for designing innovative learning experiences that can take place in a variety of indoor and outdoor settings, such as botanical gardens, parks, museums and classrooms. In this paper, we present our own innovative work for bridging indoor and outdoor field-trip learning activities with the support of RFID with reader device on ubiquitous environments. The function of our system is based on strategically located RFID tags placed on objects around settings which are identified using the mobile device installed to an RFID reader. The mobile device reads the RFID tag and sends the learner's request to the field-trip learning system. And learners can be learning activities according to theirs learning levels. We also focus on the use of intelligent agents to customize learning contents for individual learners. The result of our experiment indicates that learner enjoyed learning where mobile devices are used in the system, supporting the learning activities in the context of which they are taking place.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.6 no.2
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• pp.364-370
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• 2002

A banknote counter is a machine that automates counting the money in some agencies to treat much banknotes as well as general banking agencies. The banknote counter materialized in this paper is the machine that adds the function of banknote sorting, detecting plural banknote and detecting counterfeit banknote to an existing banknote counter. The technique of sensor signal processing are used for banknote sorting. The technique of sensor application and data processing are used for detecting counterfeit banknote. The technique of precision equipment design and microprocessor application are used for high speed count. Software improved in debugging and difficulties to link with additional hardware. It was materialized through effective control algorithm and real-time signal processing with C-language on the basis of RTOS(real-time operating system) Photodiode, its applications and a magnetic resistance sensor are used as a sensor device with regard to hardware cost -cutting and process velocity. PCF80C552-24 of Philips using Intel I8051 core is used as a control microprocessor. As the results so far achieved, counterfeit banknotes made by the use of a color duplicator and a color Printer, are distinguished from real banknotes through mixing an optical with a magnetic sensor. and, in case that there are some different banknotes while counting, it is prevented for them to be counted without discriminating from the same kind of banknotes in addition to the fu notion of banknote sorting.