• Title/Summary/Keyword: implementation algorithm

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The Implementation of Day and Night Intruder Motion Detection System using Arduino Kit (아두이노 키트를 이용한 주야간 침입자 움직임 감지 시스템 구현)

  • Young-Oh Han
    • The Journal of the Korea institute of electronic communication sciences
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    • v.18 no.5
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    • pp.919-926
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    • 2023
  • In this paper, we implemented the surveillance camera system capable of day and night shooting. To this end, it is designed to capture clear images even at night using a CMOS image sensor as well as an IR-LED. In addition, a relatively simple motion detection algorithm was proposed through color model separation. Motions can be detected by extracting only the H channel from the color model, dividing the image into blocks, and then applying the block matching method using the average color value between consecutive frames. When motions are detected during filming, an alarm sounds automatically and a day and night motion detection system is implemented that can capture and save the event screen to a PC.

A Study on the Fast Computational Algorithm for the Discrete Cosine Transform(DCT) via Lifting Scheme (리프팅 구조를 경유한 고속의 DCT 계산 알고리즘에 관한 연구)

  • Inn-Ho Jee
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.23 no.6
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    • pp.75-80
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    • 2023
  • We show the design of fast invertible block transforms that can replace the DCT in future wireless and portable computing application. This is called binDCT. In binDCT, both the forward and the inverse transforms can be implemented using only binary shift and addition operation. And the binDCT inherits all desirable DCT characteristics such as high coding gain, no DC leakage, symmetric basis functions, and recursive construction. The binDCT also inherits all lifting properties such as fast implementations, invertible integer-to-integer mapping, in-place computation. Thus, this method has advantage of fast implementation for complex DCT calculations. In this paper, we present computation costs and performance analysis between DCT and binDCT using Shapiro's EZW.

FPGA-Based Post-Quantum Cryptography Hardware Accelerator Design using High Level Synthesis (HLS 를 이용한 FPGA 기반 양자내성암호 하드웨어 가속기 설계)

  • Haesung Jung;Hanyoung Lee;Hanho Lee
    • Transactions on Semiconductor Engineering
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    • v.1 no.1
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    • pp.1-8
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    • 2023
  • This paper presents the design and implementation of Crystals-Kyber, a next-generation postquantum cryptography, as a hardware accelerator on an FPGA using High-Level Synthesis (HLS). We optimized the Crystals-Kyber algorithm using various directives provided by Vitis HLS, configured the AXI interface, and designed a hardware accelerator that can be implemented on an FPGA. Then, we used Vivado tool to design the IP block and implement it on the ZYNQ ZCU106 FPGA. Finally, the video was recorded and H.264 compressed with Python code in the PYNQ framework, and the video encryption and decryption were accelerated using Crystals-Kyber hardware accelerator implemented on the FPGA.

Analysis and Implementation of Speech/Music Classification for 3GPP2 SMV Codec Employing SVM Based on Discriminative Weight Training (SMV코덱의 음성/음악 분류 성능 향상을 위한 최적화된 가중치를 적용한 입력벡터 기반의 SVM 구현)

  • Kim, Sang-Kyun;Chang, Joon-Hyuk;Cho, Ki-Ho;Kim, Nam-Soo
    • The Journal of the Acoustical Society of Korea
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    • v.28 no.5
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    • pp.471-476
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    • 2009
  • In this paper, we apply a discriminative weight training to a support vector machine (SVM) based speech/music classification for the selectable mode vocoder (SMV) of 3GPP2. In our approach, the speech/music decision rule is expressed as the SVM discriminant function by incorporating optimally weighted features of the SMV based on a minimum classification error (MCE) method which is different from the previous work in that different weights are assigned to each the feature of SMV. The performance of the proposed approach is evaluated under various conditions and yields better results compared with the conventional scheme in the SVM.

Trends in the Adoption of Artificial Intelligence for Enhancing Built Environment Efficiency: A Case Study Analysis

  • Habib SADRI;Ibrahim YITMEN
    • International conference on construction engineering and project management
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    • 2024.07a
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    • pp.479-486
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    • 2024
  • This study reviews the recently conducted case studies to explore the innovative integration of Artificial Intelligence (AI) and Machine Learning (ML) in the domain of building facility management and predictive maintenance. It systematically examines recent developments and applications of advanced computational methods, emphasizing their role in enhancing asset management accuracy, energy efficiency, and occupant comfort. The study investigates the implementation of various AI and ML techniques, such as regression methods, Artificial Neural Networks (ANNs), and deep learning models, demonstrating their utility in asset management. It also discusses the synergistic use of ML with domain-specific technologies such as Geographic Building Information Modeling (BIM), Information Systems (GIS), and Digital Twin (DT) technologies. Through a critical analysis of current trends and methodologies, the paper highlights the importance of algorithm selection based on data attributes and operational challenges in deploying sophisticated AI models. The findings underscore the transformative potential of AI and ML in facility management, offering insights into future research directions and the development of more effective, data-driven management strategies.

Development of Selective Harmonic Elimination PWM technique for voltage quality improvement of a single phase Cascaded H-Bridge inverter (단상 Cascaded H-Bridge 인버터의 출력 전압 품질 향상을 위한 선택적 고조파 제거 변조 기법 개발)

  • Bokwon Lee;Jae Suk Lee
    • Journal of IKEEE
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    • v.28 no.3
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    • pp.432-439
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    • 2024
  • This paper introduces an enhanced Selective Harmonic Elimination (SHE) technique of a single-phase Cascaded H-Bridge (CHB) Multilevel Inverter (MLI) for improving the reliability and power quality of a second life battery energy storage system (ESS). The technique involves solving non-linear transcendental equations derived from Fourier series offline to determine the optimal switching angles for the proposed SHE-PWM implementation. These angles are then applied in real-time via a Look-Up Table (LUT). The Levenberg-Marquardt algorithm, an iterative method, is employed in MATLAB to solve the equations and obtain the switching angles. The effectiveness of the proposed method is validated using PLECS simulation software and is compared with other conventional PWM techniques for MLIs.

Key Bit-dependent Attack on Side-Channel Analysis-Resistant Hardware Binary Scalar Multiplication Algorithm using a Single-Trace (부채널 분석에 안전한 하드웨어 이진 스칼라 곱셈 알고리즘에 대한 단일 파형 비밀 키 비트 종속 공격)

  • Sim, Bo-Yeon;Kang, Junki;Han, Dong-Guk
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.28 no.5
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    • pp.1079-1087
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    • 2018
  • Binary scalar multiplication which is the main operation of elliptic curve cryptography is vulnerable to the side-channel analysis. Especially, it is vulnerable to the side-channel analysis which uses power consumption and electromagnetic emission patterns. Thus, various countermeasures have been studied. However, they have focused on eliminating patterns of data dependent branches, statistical characteristic according to intermediate values, or the interrelationships between data. No countermeasure have been taken into account for the secure design of the key bit check phase, although the secret scalar bits are directly loaded during that phase. Therefore, in this paper, we demonstrate that we can extract secret scalar bits with 100% success rate using a single power or a single electromagnetic trace by performing key bit-dependent attack on hardware implementation of binary scalar multiplication algorithm. Experiments are focused on the $Montgomery-L{\acute{o}}pez-Dahab$ ladder algorithm protected by scalar randomization. Our attack does not require sophisticated pre-processing and can defeat existing countermeasures using a single-trace. As a result, we propose a countermeasure and suggest that it should be applied.

PSO-Based PID Controller for AVR Systems Concerned with Design Specification (설계사양을 고려한 AVR 시스템의 PSO 기반 PID 제어기)

  • Lee, Yun-Hyung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.19 no.10
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    • pp.330-338
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    • 2018
  • The proportional-integral-derivative(PID) controller has been widely used in the industry because of its robust performance and simple structure in a wide range of operating conditions. However, the AVR(Automatic Voltage Regulator) as a control system is not robust to variations of the power system parameters. Therefore, it is necessary to use PID controller to increase the stability and performance of the AVR system. In this paper, a novel design method for determining the optimal PID controller parameters of an AVR system using the particle swarm optimization(PSO) algorithm is presented. The proposed approach has superior features, including easy implementation, stable convergence characteristic and good computational efficiency. In order to assist estimating the performance of the proposed PSO-PID controller, a new performance criterion function is also defined. This evaluation function is intended to reflect when the maximum percentage overshoot, the settling time are given as design specifications. The ITAE evaluation function should impose a penalty if the design specifications are violated, so that the PSO algorithm satisfies the specifications when searching for the PID controller parameter. Finally, through the computer simulations, the proposed PSO-PID controller not only satisfies the given design specifications for the terminal voltage step response, but also shows better control performance than other similar recent studies.

A File System for User Special Functions using Speed-based Prefetch in Embedded Multimedia Systems (임베디드 멀티미디어 재생기에서 속도기반 미리읽기를 이용한 사용자기능 지원 파일시스템)

  • Choe, Tae-Young;Yoon, Hyeon-Ju
    • Journal of KIISE:Computing Practices and Letters
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    • v.14 no.7
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    • pp.625-635
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    • 2008
  • Portable multimedia players have some different properties compared to general multimedia file server. Some of those properties are single user ownership, relatively low hardware performance, I/O burst by user special functions, and short software development cycles. Though suitable for processing multiple user requests at a time, the general multimedia file systems are not efficient for special user functions such as fast forwards/backwards. Soml' methods has been proposed to improve the performance and functionality, which the application programs give prediction hints to the file system. Unfortunately, they require the modification of all applications and recompilation. In this paper, we present a file system that efficiently supports user special functions in embedded multimedia systems using file block allocation, buffer-cache, and prefetch. A prefetch algorithm, SPRA (SPeed-based PRefetch Algorithm) predicts the next block using I/O patterns instead of hints from applications and it is resident in the file system, so doesn't affect application development process. From the experimental file system implementation and comparison with Linux readahead-based algorithms, the proposed system shows $4.29%{\sim}52.63%$ turnaround time and 1.01 to 3,09 times throughput in average.

The implementation of cable path and overfill visualization based on cable occupancy rate in the Shipbuilding CAD (조선 CAD에서 선박의 Cable 점유율을 기반으로 Cable 경로 및 Overfill 가시화 구현)

  • Kim, Hyeon-Jae;Kim, Bong-Gi
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.17 no.11
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    • pp.740-745
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    • 2016
  • Cables are installed for tens of thousands of connections between various pieces of equipment to operate and control a commercial ship. The correct shortest-route data is necessary since these are complicated cable installations. Therefore, an overfill interval commonly exists in the shortest paths for cables as estimated by Dijkstra's algorithm, even if this algorithm is generally used. It is difficult for an electrical engineer to find the overfill interval in 3D cable models because the occupancy rate data exist in a data sheet unlinked to three-dimensional (3D) computer-aided design (CAD). The purpose of this study is to suggest a visualization method that displays the cable path and overfill interval in 3D CAD. This method also provides various color visualizations for different overfill ranges to easily determine the overfill interval. This method can reduce cable-installation man-hours from 7,000 to 5,600 thanks to a decreased re-installation rate, because the cable length calculation's accuracy is raised through fast and accurate reviews based on 3D cable visualization. As a result, material costs can also be reduced.