• Title/Summary/Keyword: implementation algorithm

Search Result 4,233, Processing Time 0.029 seconds

Implementation of Interference Cancellation System for Relay Utilizing the CGM Algorithm (CGM 알고리즘을 이용한 중계기 간섭제거기 구현)

  • Ahn, Sung Soo;Ko, Jung Hwan
    • Journal of Korea Society of Digital Industry and Information Management
    • /
    • v.8 no.1
    • /
    • pp.139-145
    • /
    • 2012
  • This paper shows a novel interference cancellation method of relay utilizing to the CGM algorithm in wireless communication environments. It is a problem that relay have interference cause by feedback signal of it. CGM algorithm obtained weight value that can remove the interference due to feedback signal of relay. In this paper, we confirm that performance of CGM algorithm is far superior with suitable cancellation value to remove the feedback signal. Also, we implement CGM module to verify the real-time processing of CGM algorithm using to DSP. Based on the analysis from computer simulation, it is observed that proposed algorithm is suitable for the relay in time-varying environment.

Implementation of Fuzzy Control Algorithm For Nuclear Power Plant Steam Generator Level Control At Field Controller (원자력발전소 증기발생기 수위제어를 위한 퍼지제어기법의 현장 제어기계에의 적용)

  • 박기용;허우성;성풍현
    • Transactions of the Korean Society of Mechanical Engineers
    • /
    • v.19 no.1
    • /
    • pp.111-121
    • /
    • 1995
  • A fuzzy control algorithm of bell-type membership functions and 9 rules is constructed for narrow range level control of steam generators in nuclear power plants. It is implemented at a field digital distributed controller, a Westinghouse-made controller called Westinghouse Distributed Processing Family(WDPF). Performance for level control of the developed fuzzy controller is compared with that of conventional controller, both at the field controller. For these comparisons, both the fuzzy control algorithm and the conventional PI control algorithm were carefully tuned. Also the sampling time for optimal performance was investigated. The results show that the fuzzy control algorithm is not only better in performance than the conventional algorithm but also much easier to be tuned by operators in the field.

A Study on Fast Convergence Algorithm of Block Adaptive Filter in Frequency Domain (주파수 영역에서 블럭적응 필터의 고속 수렴 알고리즘에 관한 연구)

  • 강철호;조해남
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.10 no.6
    • /
    • pp.308-316
    • /
    • 1985
  • A new implementation of Block Adaptive filter in frequency domain is presented in this paper. Block digital filtering involves the calculation of a block or finite set of filter out put from a block of input values. A fast convergence algorithm of block adaptive filter is developed using Gordar theory and compared with the performance results of Satio algorithm and BLMS algorithm. Form the result we can be shown that the convergence state of given algorithm is not only faster than BLMS algorithm but also the resulting convergence error is less than the convergence error of Satio algorithm.

  • PDF

A Novel Optimization Algorithm Inspired by Bacteria Behavior Patterns

  • Jung, Sung-Hoon;Kim, Tae-Geon
    • Journal of the Korean Institute of Intelligent Systems
    • /
    • v.18 no.3
    • /
    • pp.392-400
    • /
    • 2008
  • This paper proposes a novel optimization algorithm inspired by bacteria behavior patterns for foraging. Most bacteria can trace attractant chemical molecules for foraging. This tracing capability of bacteria called chemotaxis might be optimized for foraging because it has been evolved for few millenniums. From this observation, we developed a new optimization algorithm based on the chemotaxis of bacteria in this paper. We first define behavior and decision rules based on the behavior patterns of bacteria and then devise an optimization algorithm with these behavior and decision rules. Generally bacteria have a quorum sensing mechanism that makes it possible to effectively forage, but we leave its implementation as a further work for simplicity. Thereby, we call our algorithm a simple bacteria cooperative optimization (BCO) algorithm. Our simple BCO is tested with four function optimization problems on various' parameters of the algorithm. It was found from experiments that the simple BCO can be a good framework for optimization.

Hardware Accelerated Design on Bag of Words Classification Algorithm

  • Lee, Chang-yong;Lee, Ji-yong;Lee, Yong-hwan
    • Journal of Platform Technology
    • /
    • v.6 no.4
    • /
    • pp.26-33
    • /
    • 2018
  • In this paper, we propose an image retrieval algorithm for real-time processing and design it as hardware. The proposed method is based on the classification of BoWs(Bag of Words) algorithm and proposes an image search algorithm using bit stream. K-fold cross validation is used for the verification of the algorithm. Data is classified into seven classes, each class has seven images and a total of 49 images are tested. The test has two kinds of accuracy measurement and speed measurement. The accuracy of the image classification was 86.2% for the BoWs algorithm and 83.7% the proposed hardware-accelerated software implementation algorithm, and the BoWs algorithm was 2.5% higher. The image retrieval processing speed of BoWs is 7.89s and our algorithm is 1.55s. Our algorithm is 5.09 times faster than BoWs algorithm. The algorithm is largely divided into software and hardware parts. In the software structure, C-language is used. The Scale Invariant Feature Transform algorithm is used to extract feature points that are invariant to size and rotation from the image. Bit streams are generated from the extracted feature point. In the hardware architecture, the proposed image retrieval algorithm is written in Verilog HDL and designed and verified by FPGA and Design Compiler. The generated bit streams are stored, the clustering step is performed, and a searcher image databases or an input image databases are generated and matched. Using the proposed algorithm, we can improve convenience and satisfaction of the user in terms of speed if we search using database matching method which represents each object.

Optimization Study of Toom-Cook Algorithm in NIST PQC SABER Utilizing ARM/NEON Processor (ARM/NEON 프로세서를 활용한 NIST PQC SABER에서 Toom-Cook 알고리즘 최적화 구현 연구)

  • Song, JinGyo;Kim, YoungBeom;Seo, Seog Chung
    • Journal of the Korea Institute of Information Security & Cryptology
    • /
    • v.31 no.3
    • /
    • pp.463-471
    • /
    • 2021
  • Since 2016, National Institute of Standards and Technology (NIST) has been conducting a post quantum cryptography standardization project in preparation for a quantum computing environment. Three rounds are currently in progress, and most of the candidates (5/7) are lattice-based. Lattice-based post quantum cryptography is evaluated to be applicable even in an embedded environment where resources are limited by providing efficient operation processing and appropriate key length. Among them, SABER KEM provides the efficient modulus and Toom-Cook to process polynomial multiplication with computation-intensive tasks. In this paper, we present the optimized implementation of evaluation and interpolation in Toom-Cook algorithm of SABER utilizing ARM/NEON in ARMv8-A platform. In the evaluation process, we propose an efficient interleaving method of ARM/NEON, and in the interpolation process, we introduce an optimized implementation methodology applicable in various embedded environments. As a result, the proposed implementation achieved 3.5 times faster performance in the evaluation process and 5 times faster in the interpolation process than the previous reference implementation.

A Study on Implementation of the Design Support System Frame with the Functional Extension (기능 확장을 고려한 설계 지원 시스템 프레임 구현에 관한 연구)

  • Shin, Dae-Jin;Bae, Il-Ju;Lee, Soo-Hong
    • Korean Journal of Computational Design and Engineering
    • /
    • v.12 no.2
    • /
    • pp.118-125
    • /
    • 2007
  • Designer has recently required the supporting system to assist the design steps that are not simple and standardized. But, as it is often the case with many researches, the design support systems have the problems that the functional module's expansion and the flexible connection with the intelligent CAD System are insufficient. In this paper, we present a framework, EDSS Frame (Expanded Design Support System Frame) to improve in its problems. For the implementation of the EDSS Frame, we make the functional modules, the executable files and analyze a characteristic of the functional modules. Finally, we checked the cases that is generated. Through these works, we organize the algorithm of the running process in each cases. A user can make the process through the association of the functional modules. Also, we make the DLL files or algorithms for corresponding in change of the intelligent CAD System. User can make the additional file or algorithm for a new release of the intelligent CAD system. EDSS Frame can be used for the implementation of the design support system on a various fields, and assists a designer with the rapid reconstruction of the design support system through the continuous addition of the functional modules and the redefinition of the running process between the functional modules.

Analysis and implementation of fast discrete coisne transform on TMS320C80 (TMS320C80 시스템에서의 고속 이산 여현 변환의 해석 및 구현)

  • 유현범;박현욱
    • Journal of the Korean Institute of Telematics and Electronics S
    • /
    • v.34S no.1
    • /
    • pp.124-131
    • /
    • 1997
  • There have been many demands for th ereal-time image compression. The image compression systems have a wide range of applications. However, real-time encoding is hard to implement because it needs a large amount of computations. In particular, the discrete cosine transform (DCT) and motion estimatio require a large number of arithmetic oeprations compared to other algorithms in MPEG-2. The conventional fasdt DCT algorithms have focused on the reduction of the number of additions more cycles and more expense in realization. Because TMS320C80 has special structure, new approach for implementation of DCT is suggested. The selection of adaptive algorithm and optimization is requried TMS320C80 are analyzed an dsome adaptive DCT algorithms are selected. The DCT algorithms are optimized and implemented. Chens and lees DCT algorithms among various fast algorithms are selected because 1-D approach is effective in the view of th einternal structure of TMS320C80. According to the simulation result, Lees algorithm is more effective in speed and has little difference in precision. On the basis of the result, the possibility of DCT implementation for real-time MPEG-2 system is verified and the required number of the processor, called advanced DSP, is decided for real-time MPEG-2 encoding and decoding.

  • PDF

Practical and Verifiable C++ Dynamic Cast for Hard Real-Time Systems

  • Dechev, Damian;Mahapatra, Rabi;Stroustrup, Bjarne
    • Journal of Computing Science and Engineering
    • /
    • v.2 no.4
    • /
    • pp.375-393
    • /
    • 2008
  • The dynamic cast operation allows flexibility in the design and use of data management facilities in object-oriented programs. Dynamic cast has an important role in the implementation of the Data Management Services (DMS) of the Mission Data System Project (MDS), the Jet Propulsion Laboratory's experimental work for providing a state-based and goal-oriented unified architecture for testing and development of mission software. DMS is responsible for the storage and transport of control and scientific data in a remote autonomous spacecraft. Like similar operators in other languages, the C++ dynamic cast operator does not provide the timing guarantees needed for hard real-time embedded systems. In a recent study, Gibbs and Stroustrup (G&S) devised a dynamic cast implementation strategy that guarantees fast constant-time performance. This paper presents the definition and application of a cosimulation framework to formally verify and evaluate the G&S fast dynamic casting scheme and its applicability in the Mission Data System DMS application. We describe the systematic process of model-based simulation and analysis that has led to performance improvement of the G&S algorithm's heuristics by about a factor of 2. In this work we introduce and apply a library for extracting semantic information from C++ source code that helps us deliver a practical and verifiable implementation of the fast dynamic casting algorithm.

FPGA Implementation of ARIA Encryption/Decrytion Core Supporting Four Modes of Operation (4가지 운영모드를 지원하는 ARIA 암호/복호 코어의 FPGA 구현)

  • Kim, Dong-Hyeon;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2012.10a
    • /
    • pp.237-240
    • /
    • 2012
  • This paper describes an implementation of ARIA crypto algorithm which is a KS (Korea Standards) block cipher algorithm. The ARIA crypto-core supports three master key lengths of 128/192/256-bit specified in the standard and the four modes of operation including ECB, CBC, CTR and OFB. To reduce hardware complexity, a hardware sharing is employed, which shares round function in encryption/decryption module with key initialization module. The ARIA crypto-core is verified by FPGA implementation, the estimated throughput is about 1.07 Gbps at 167 MHz.

  • PDF