• Title/Summary/Keyword: implementation algorithm

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Implementation of Efficient Inverse Multiplier for Smart Card (스마트 카드에서의 Multiplicative Inverse 연산을 위한 효율적인 하드웨어의 구현)

  • Um, Jun-Hyung;Lee, Sang-Woo;Park, Young-Soo;Jeon, Sung-Ik
    • Annual Conference of KIPS
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    • 2002.11b
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    • pp.995-998
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    • 2002
  • 여러 내장형 시스템에 탑재되는 암호모듈의 구현에 있어, 공개키 알고리즘을 위한 ECC 연산의 지연시간을 단축시키기 위해 유한체 연산은 하드웨어로 구현되는 경우가 많다. 그 중에서도 역원 연산은 지연시간 및 전력 소모, 또한 회로 면적에 있어 가장 주요한 부분을 차지하기 때문에 보다 효율적으로 구현하는 것이 필요하다. 본 논문에서 우리는 효율적인 역원 연산, 즉 작은 회로의 역원기를 위한 하드웨어의 구조를 제안한다. 실험에서, 우리가 구현한 구조는 기존에 주로 쓰이는 Modified Inverse Algorithm의 구현에 비해 비슷한 지연시간을 가지면서 회로 면적에 있어 큰 감소를 보이며 이는 스마트 카드 뿐 아니라 여러 mobile 내장형 시스템에 광범위하게 쓰일 수 있다.

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The Implementation of SEED Cipher Algorithm Test Module Applied CMVP Test (CMVP 테스트를 적용한 SEED 암호 알고리즘 모듈 구현)

  • Park, Seong-Gun;Jeong, Seong-Min;Seo, Chang-Ho;Kim, Il-Jun;Shin, Seung-Jung;Kim, Seok-Woo
    • Annual Conference of KIPS
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    • 2003.05c
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    • pp.1937-1940
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    • 2003
  • 정보보호 평가는 크게 시스템 평가인 CC(Common Criteria)평가와 암호모듈 평가인 CMVP(Cryptographic Module Validation Program)평가로 나눌 수 있다. 본 논문은 국내 표준 암호 알고리즘 SEED를 북미의 CMVP의 3가지 블록 알고리즘 시험방법인 KAT(Known Answer Test), MCT(Monte C미개 Test), MMT(Multi-block Message Test)를 JAVA환경에 적용하여 시범 구현하였다. 테스트 방법으로 CMVP의 MOVS, TMOVS, AESAVS를 선정하여 FIPS 표준을 적용하였다. 구현 환경으로는 JCE기반의 Cryptix를 채택하여 CMVP의 블록 암호 알고리즘 테스트 시스템 중 일부를 구현하였다.

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Implementation of Sequential Pattern Mining algorithm For Analysis of Alert data. (경보데이터 패턴분석을 위한 순차패턴 알고리즘의 구현)

  • Ghim, Hohn-Woong;Shin, Moon-Sun;Ryu, Keun-Ho;Jang, Jong-Soo
    • Annual Conference of KIPS
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    • 2003.05c
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    • pp.1555-1558
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    • 2003
  • 침입탐지란 컴퓨터와 네트워크 자원에 대한 유해한 침입 행동을 식별하고 대응하는 과정이다. 점차적으로 시스템에 대한 침입의 유형들이 복잡해지고 전문적으로 이루어지면서 빠르고 정확한 대응을 필요로 하는 시스템이 요구되고 있다. 이에 대용량의 데이터를 분석하여 의미 있는 정보를 추출하는 데이터 마이닝 기법을 적용하여 지능적이고 자동화된 탐지 및 경보데이터 분석에 이용할 수 있다. 마이닝 기법중의 하나인 순차 패턴 탐사 방법은 일정한 시퀸스 내의 빈발한 항목을 추출하여 순차적으로 패턴을 탐사하는 방법이며 이를 이용하여 시퀸스의 행동을 예측하거나 기술할 수 있는 규칙들을 생성할 수 있다. 이 논문에서는 대량의 경보 데이터를 효율적으로 분석하고 반복적인 공격 패턴에 능동적인 대응을 위한 방법으로 확장된 순차패턴 알고리즘인 PrefixSpan 알고리즘에 대해 제안하였고 이를 적용하므로써 침입탐지 시스템의 자동화 및 성능의 향상을 얻을 수 있다.

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Expressive Exceptions for Safe Pervasive Spaces

  • Cho, Eun-Sun;Helal, Sumi
    • Journal of Information Processing Systems
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    • v.8 no.2
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    • pp.279-300
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    • 2012
  • Uncertainty and dynamism surrounding pervasive systems require new and sophisticated approaches to defining, detecting, and handling complex exceptions. This is because the possible erroneous conditions in pervasive systems are more complicated than conditions found in traditional applications. We devised a novel exception description and detection mechanism based on "situation"- a novel extension of context, which allows programmers to devise their own handling routines targeting sophisticated exceptions. This paper introduces the syntax of a language support that empowers the expressiveness of exceptions and their handlers, and suggests an implementation algorithm with a straw man analysis of overhead.

Optimized PWM Switching Strategy for an Induction Motor Voltage Control

  • Lee, Hae-Hyung;Hwang, Seuk-Yung
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1998.06a
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    • pp.527-533
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    • 1998
  • An optimized PWM switching strategy for an induction motor voltage control is developed and demonstrated. Space vector modulation in voltage source inverter offers improved DC-bus utilization and reduced commutation losses, and has been therefor recognizedas the perfered PWM method, especially in the case of digital implementation. Three-phase invertor voltage control by space vector modulation consists of switching between the two active and one zero voltage vector by using the proposed optimal PWM algorithm. The prefered switching sequence is defined as a function of the modulation index and period of a carrier wave. The sequence is selected by suing the inverter switching losses and the current ripple as the criteria. For low and medium power application, the experimental results indicate that good dynamic response and reduced harmonic distortion can be achieved by increasing switching frequency.

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Implementation of A Pulse-mode Digital Neural Network with On-chip Learning Using Stochastic Computation (On-Chip 학습기능을 가진 확률연산 펄스형 디지털 신경망의 구현)

  • Wee, Jae-Woo;Lee, Chong-Ho
    • Proceedings of the KIEE Conference
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    • 1998.07g
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    • pp.2296-2298
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    • 1998
  • In this paper, an on-chip learning pulse-mode digital neural network with a massively parallel yet compact and flexible network architecture is suggested. Algebraic neural operations are replaced by stochastic processes using pseudo-random sequences and simple logic gates are used as basic computing elements. Using Back-propagation algorithm both feed-forward and learning phases are efficiently implemented with simple logical gates. RNG architecture using LFSR and barrel shifter are adopted to avoid some correlation between pulse trains. Suggested network is designed in digital circuit and its performance is verified by computer simulation.

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Implementation of Fuzzy Self-Organizing Networks Algorithm and Its Application to Nonlinear Systems (퍼지 자기구성 네트워크 알고리즘의 구현 및 비선형 시스템으로의 응용)

  • Park, Byoung-Jun;Kim, Dong-Won;Lee, Dae-Keun;Oh, Sung-Kwun
    • Proceedings of the KIEE Conference
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    • 2000.07d
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    • pp.3001-3003
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    • 2000
  • In this paper. we propose Fuzzy Self-Organizing Networks (FSON) using both Polynomial Neural Networks(PNN) and Fuzzy Neural Networks(FNN) for model identification of complex and nonlinear systems. The proposed FSON is generated from the mutually combined structure of both FNN and PNN. Accordingly it is possible to consider the nonlinearity characteristics of process and to get the better output performance with superb predictive ability. In order to evaluate the performance of proposed models. we use the nonlinear data sets. The results show that the proposed FSON can produce the model with higher accuracy and more robustness than previous any other method.

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ASIC Design for Vector Control of Induction Motor (유도전동기의 벡터제어 ASIC 설계)

  • Park, H.J.;Kim, S.J.;Lee, H.J.;Kwon, Y.A.
    • Proceedings of the KIEE Conference
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    • 2000.07b
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    • pp.1099-1101
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    • 2000
  • ASIC chip design for motor control has been a subject of increasing interest since an effective methodology of system-on-a-chip design was developed. This paper investigates the design and implementation of ASIC chip for vector control of induction motor using VHDL which is a standard hardware description language. The vector control algorithm is finally implemented using a simple electronic circuit based on FPGA. The performance of the designed ASIC is verified through simulation and experiment.

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Implementation of Evolving Neural Network Controller for Inverted Pendulum System (진화형 신경회로망에 의한 도립진자 제어시스템의 구현)

  • Shim, Young-Jin;Kim, Min-Sung;Park, Doo-Hwan;Choi, Woo-Jin;Ha, Hong-Gon;Lee, Joon-Tark
    • Proceedings of the KIEE Conference
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    • 2000.07d
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    • pp.3013-3015
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    • 2000
  • The stabilization control of Inverted Pendulum(IP) system is difficult because of its nonlinearity and structural unstability. Futhermore, a series of conventional techniques such as the pole placement and the optimal control based on the local linearizations have narrow stabilizable regions, At the same time, the fine tunings of their gain parameters are also troublesome, Thus, in this paper, an Evolving Neural Network ControlleY(ENNC) which its structure and its connection weights are optimized simultaneously by Real Variable Elitist Genetic Algorithm (RVEGA) was presented for stabilization of an IP system with nonlinearity, This proposed ENNC was described by a simple genetic chromosome. Through the simulation and experimental results, we showed that the finally acquired optimal ENNC was very useful in the stabilization control of IP system.

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Implementation of Optimal Train control algorithm using Simulated Anealir (시뮬레이티드 어닐링(SA)을 이용한 열차최적제어 알고리즘의 구현)

  • Han, Seong-Ho;Baek, Jong-Hyen;Lee, Su-Gil;Byen, Yun-Sub;An, Tae-Ki;Ohn, Jeung-Geun;Park, Hyun-Jun;Jeon, Young-Jae;Kim, Jae-Chul
    • Proceedings of the KIEE Conference
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    • 1999.07a
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    • pp.486-488
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    • 1999
  • This paper shows the form of the optimal solution and how to minimize energy of train driving control using SA(simulated annealing). In this paper, we consider the case where a train is to be driven by automatic operation mode along a non-constant gradient, curve and with speed limits. Using the combinational optimal technique, SA, we constructed optimal train driving strategy.

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