• Title/Summary/Keyword: implementation algorithm

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Implementation of Optimal User Interface based on the Voice Output Embedded System for People with Profound Communication Disorder (중증언어장애자를 위한 음성 출력 임베디드 시스템을 기반으로 한 최적의 사용자 인터페이스 구현)

  • Yoo, Byung-Hyuk;Lee, Sang-Hun;Seo, Hee-Don
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.885-886
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    • 2006
  • The purpose of this study is to develop the optimal system(AAC device), which helps a person with a profound communication disorder to communicate with other people. Therefore, this system includes the user interface enhancement that is the user adaptation mode algorithm. The symbol is made with a text and an icon which is converted into Korean. The message contiol operates scanning and adjusts rate control of row-column scanning and linear scanning. This embedded system includes voice input/output and voice recording as well suggested method that could apply optimal device access algorithm from clinical environment. Therefore, we are experting that even the current system itself will be able to improve the life quality of people who need to communicate with the help of devices.

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Low-Power Radix-4 butterfly structure for OFDM FFT (OFDM FFT용 저전력 Radix-4 나비연산기 구조)

  • Kim, Do-Han;Kim, Bee-Chul;Hur, Eun-Sung;Lee, Won-Sang;Jang, Young-Beom
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.13-14
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    • 2006
  • In this paper, an efficient butterfly structure for Radix-4 FFT algorithm using DA(Distributed Arithmetic) is proposed. It is shown that DA can be efficiently used in twiddle factor calculation of the Radix-4 FFT algorithm. The Verilog-HDL coding results for the proposed DA butterfly structure show 61.02% cell area reduction comparison with those of the conventional multiplier butterfly structure. Furthermore, the 64-point Radix-4 pipeline structure using the proposed butterfly and delay commutators is compared with other conventional structures. Implementation coding results show 46.1% cell area reduction.

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Visualizer for real number domain data and its applications (실수 정의역 데이터 시각화와 그 응용 사례)

  • Lee, Sung-Ho;Park, Tae-Jung;Kam, Hyeong-Ryeol;Kim, Chang-Hun
    • Journal of the Korea Computer Graphics Society
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    • v.16 no.4
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    • pp.17-23
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    • 2010
  • Effective visualizing is an important issue when one processing real number domain volume data such as distance fields, or volume texture. In this paper, we introduce a framework for inspecting, magnifying, cross-section viewing of real number domain volume data from an implementation of a simple interface. The interface can be freely implemented from any kind of existing algorithm, so that we can easily view the result and evaluate the algorithm.

A Study on Embodiment of Evolving Cellular Automata Neural Systems using Evolvable Hardware

  • Sim, Kwee-Bo;Ban, Chang-Bong
    • Journal of the Korean Institute of Intelligent Systems
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    • v.11 no.8
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    • pp.746-753
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    • 2001
  • In this paper, we review the basic concept of Evolvable Hardware first. And we examine genetic algorithm processor and hardware reconfiguration method and implementation. By considering complexity and performance of hardware at the same time, we design genetic algorithm processor using modularization and parallel processing method. And we design frame that has connection structure and logic block on FPGA, and embody reconfigurable hardware that do so that this frame may be reconstructed by RAM. Also we implemented ECANS that information processing system such as living creatures'brain using this hardware reconfiguration method. And we apply ECANS which is implemented using the concept of Evolvable Hardware to time-series prediction problem in order to verify the effectiveness.

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Analysis and Implementation of the Stacked Cavity-Backed Circular Microstrip Patch Antenna (적층형 Cavity-Backed 원형 마이크로스트립 안테나 해석 및 구현에 관한 연구)

  • 박경빈;정영배;최동혁;박성욱;문영찬;전순익
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.11 no.1
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    • pp.37-45
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    • 2000
  • Though microstrip antenna has several advantages, it makes engineers struggle against the difficulties of narrow bandwidth and scan-blindness with probe-feeding and array configuration. To overcome these disadvantages, stacked patch and cavity-backed structure had been proposed. But this structure can not be analyzed easily because we have no concrete means to analyze it. So the algorithm to analyze the structure should be established to make it useful. This paper explained the algorithm of moment method to analyze the structure and verified it by comparing the calculated and measured results.

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Area Efficient Implementation Of 128-Bit Block Cipher, SEED

  • Seo, Young-Ho;Kim, Jong-Hyeon;Jung, Young-Jin;Kim, Dong-Wook
    • Proceedings of the IEEK Conference
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    • 2000.07a
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    • pp.339-342
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    • 2000
  • This paper presented a FPGA design of SEED, which is the Korea standard 128-bit block cipher. In this work, SEED was designed technology- independently for other applications such as ASIC or core-based designs. Hence in case of changing the target of design, it is not necessary to modify design or need only minor modification to reuse the design. Since SEED algorithm requires a lot of hardware resources, each unit was designed only once and used sequentially. So, the number of gates was minimized and SEED algorithm was fitted in FPGA without additional components. It was confirmed that the rate of resource usage is about 80% in ALTERA 10KE and the SEED design operates in a clock frequency of 131.57 MHz and an encryption rate of 29 Mbps.

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A Study on Implementation of a MPLS Router Supporting Diffserv for QoS and High-speed Switching

  • Lee, Tae-Won;Kim, Young-chul
    • Proceedings of the IEEK Conference
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    • 2002.07c
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    • pp.1847-1850
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    • 2002
  • In this paper, MPLS Router module supporting Differentiated Service(Diffserv) for quality of Service (QoS) and High-speed switching is proposed and implemented. And we compare and analyze the proposed architecture with the conventional one in terms of CLR (Cell Loss Rate) and average delay. Switch is an extended system of Queue of each VOQ and PHB in the manner of Input Queuing for QoS. Algorithm, Priority-iSLIP is used for its scheduling algorithm. The proposed architecture is modeled in C++ and verified.

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Formal description and reference implementation generation of MD4 message digest algorithm (MD4 해쉬알고리즘의 형식적 표현과 참조구현 코드 생성)

  • 김기수;김영화;염창선;류재철
    • Proceedings of the Korea Institutes of Information Security and Cryptology Conference
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    • 1995.11a
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    • pp.126-137
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    • 1995
  • VDM-SL(Vienna Development Method - Specification Language)은 다양한 표준들의 정확한 기술을 위해 제시되고 있는 형식규격어의 하나로서 특히 보안표준의 표현에 적합한 형식규격어이다. 이러한 VDM-SL을 사용하여 보안표준의 표현 및 실행코드 생성의 정확성과 편리성을 제공하기 위한 다양한 도구들이 개발되고 있으며 이들 중 IFAD VDM-SL Toolbox는 가장 많은 기능을 구진 도구이다. 본 논문에서는 IFAD WDM-SL Toolbox를 이용해 해쉬알고리즘의 하나인 MD4 Message Digest Algorithm을 형식적 표현기법으로 나타내고 이를 바탕으로 참조구현 코드를 C++로 생성하는 방법을 설명한다. 또한 형식적 표현기법과 IFAD VDM-SL Toolbox를 이용해 생성된 참조구현코드의 실행 결과를 MD4의 테스트 벡터 (test vector)를 이용하여 RSA사에서 구현한 MD4 알고리즘과 비교 분석하여 형식적 표현기법을 이용하여 생성된 코드의 활용성에 대해 설명하고자 한다.

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A Study on a Queue Management for Alleviating the Bandwidth Skew Problem in Differentiated Service Network (차별 서비스 네트워크에서 대역폭 스큐 문제를 완화하는 큐 관리 기법 연구)

  • 명성원;황구연;이성근
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2002.05a
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    • pp.121-124
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    • 2002
  • In Diffserv Network, RIO is the most effective active queue management algorithm. RIO, the enhanced queue management algorithm from RED, divides IN and OUT packets and manages them differently. one of the main problems for the implementation of RIO is the Bandwidth Skew problem for providing the Assured Service. In this paper, we will show the bandwidth skew problem in RIO and provide an enhanced RIO mechanism that will alleviate the bandwidth skew problem.

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A Study on the Fast Image Reconstruction Algorithm for Spiral CT (Spiral CT의 고속 영상재구성 알고리즘에 관한 연구)

  • Heo, Chang-Won;Jin, Seung-Oh;Lee, Jae-Duck;Huh, Young
    • Proceedings of the KIEE Conference
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    • 2000.07d
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    • pp.3207-3209
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    • 2000
  • X-ray CT(Computed Tomography) has been a good modality for non-invasive diagnosis and recently, Conventional CT has been replaced rapidly with Spiral CT in recent. In X-ray CT, spiral scanning has various advantages such as better image quality, reduced scan time (in a single breath-hold), a lower x-ray dose. But, it requires very fast and high performance image processing system to reconstruct slice images from spiral scanning. This paper describes the fast image reconstruction techniques with filtered back projection from the viewpoints of fast algorithm as well as hardware implementation for real-time imaging.

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