• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.1129-1132
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• 1999

This paper deals with the design and implementation of an Ethernet-based communication protocol to be used in PC-based I/O interface systems. Recently, the performance of PC systems is being highly improved and Ethernet is used as the stable communication network over the world. We develop a new protocol driver with the capability of accessing Ethernet directly using NDIS(Network Driver Interface Specification), the network interface standard of Windows O.S. in PC, and install it at the application layer of the protocol structure. Its major roles are the supplement of CSMA/CD algorithm, the effective use of the long data frame of Ethernet, and the real-time transmission of data frames. This paper represents the possibility of the real-time control network and systems based on PCs and Ethernet.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.333-336
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• 1999

In this paper, a new high speed parallel input and parallel output GF(2$^{m}$ ) multiplier based on standard basis is proposed. The concept of the multiplication in standard basis coordinates gives an easier VLSI implementation than that of the dual basis. This proposed algorithm and method of implementation of the GF(2$^{m}$ ) multiplication are represented by two kinds of basic cells (which are the generalized and fixed basic cell), and the minimum critical path with pipelined operation. In the case of the generalized basic cell, the proposed multiplier is composed of $m^2$ basic cells where each cell has 2 two input AND gates, 2 two input XOR gates, and 2 one bit latches Specifically, we show that the proposed multiplier has smaller complexity than those proposed in 〔5〕.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.34S no.6
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• pp.67-76
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• 1997

In radar signal processing, an A/D converter with sufficient dynamic range and high sampling speed is required to detect the weakest target signals in heavy clutter and ECM environments. As the sampling frequency increases, the amount of digital data transfered to the signal processing module is also increased. To overcome these massive data transfer burden, we need an A/D conversion module with an enough data transfer rate. In this paper, we proposed an implementation scheme of a new A/D conversio module that can be used in multi-mode 3-D phased array radar signal processing system, and evaluated the performance. The proposed A/D conversion module is implemented with a standard A/D converter and a 6U-standard VME bus.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.3
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• pp.19-28
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• 1998

This paper is concerned with the implementation of the equalization technique in a DCS 1800 system employing the soft-decision output Viterbi algorithm (SOVA), which makes the hardware complexity comparable to the hard decision MLSE and gives reliable performance. Also, the channel estimation technique with enhances the perfdormance of the soft-decision output equalizer is proposed, and the Viterbi decoder which operates effectively with the soft-decision output of the qualizer is implemented using the Very High Speed ICs Hardware Description Language (VHDL). From the simulation results, it is shown that the implemented Viterbi decoder operates effectively and the SOVA outperforms the hard-decision MLSE in terms of the frame erasure rate (FER) and bit error rate (BER).

• Proceedings of the IEEK Conference
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• 2000.06e
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• pp.113-116
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• 2000

In this paper presents the portable wireless ECG data detection and diagnosis system based on discreet wavelet transform. An algorithm based on wavelet transform suitable for real time implementation has been developed in order to detect ECG characteristics. In particular, QRS complex, S and T waves may be distinguished form noise, baseline drift or artifacts. Proposed telemetry system that a transmitting media using radio frequency(RF) for the middle range measurement of the physiological signals and receiving media using optical for electromagnetic interference problem. A standard hi-directional serial communication interface between the telemetry system and a personal computer or laptop, allows read-time controlling, diagnosing and monitoring of system. A portable telemetry system within a size. of 65${\times}$125${\times}$45mm consists of three parts: a digital signal processing part for physiological signal detect or diagnose, RF transmitter for data transfer and a optical receiver for command receive. Advantages of proposed telemetry system is wireless middle range(50m) FM transmission, reduce electromagnetic interference to a minimum. which enables a comfortable diagnosis system at home.

• Proceedings of the IEEK Conference
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• 2003.07e
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• pp.2315-2318
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• 2003

The Wavelet Transform has been applied in mathematics and computer sciences. Numerous studies have proven its advantages in image processing and data compression, and have made it a basic encoding technique in data compression standards like JPEG2000 and MPEG-4. Software implementations of the Discrete Wavelet Transform (DWT) appears to be the performance bottleneck in real-time systems in terms of performance. And hardware implementations are not flexible. Therefore, FPGA implementations of the DWT has been a topic of recent research. The goal of this thesis is to investigate of FPGA implementations of the DWT Processor for image compression applications. The DWT processor design is based on the Lifting Based Wavelet Transform Scheme, which is a fast implementation of the DWT The design uses various techniques. The DWT Processor was simulated and implemented in a FLEX FPGA platform of Altera

• Journal of the Korean Institute of Telematics and Electronics
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• v.21 no.1
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• pp.32-37
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• 1984

In this paper, a practical and simple scheme is described for the implementation of a moving average filter which is known to be able to provide low pass filter characteristics, and the estimated cut off frequency formulation of the filter and filtering algorithm are presented for the filter design. Some results of an experimental system using the commerical Z-80 microprocessor are given. It shown that high frequency noises are canceled effectively in frequency domain and time domain experiments and that results of the estimated cut off frequency formular is compared with measured one.

• The Journal of Information Technology
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• v.5 no.1
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• pp.133-142
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• 2002

This paper presents an efficient implementation of the linear window operator. I derived computational primitives based upon a block state space representation. The computational primitive can be implemented as a data path for a programmable processor, which can be used for the efficient implementation of a linear window operator. A multiprocessor architecture is presented for the realtime processing of a linear window operator. The architecture is designed based upon the data partitioning technique. Performance analysis for the various block size is provided.

• Proceedings of the KIEE Conference
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• 2007.04a
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• pp.409-412
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• 2007

Demand for the technology for access to device control network in industry and for access to building automation system via internet is on the increase. In such technology integration of a device control network with a data network such as internet and organizing wide-ranging DCS(distributed control system) is needed, and it can be realized in the framework of VDN(virtual device network). Specifications for device control network and data network are quite different because of the differences in application. So a router that translates the communication protocol between device control network and data network, and efficiently transmits information to destination is needed for implementation of the VDN(virtual device network). This paper proposes the concept of NCS(networked control system) based on VDN(virtual device network) and suggests the routing algorithm that uses embedded system.

• Transactions of the Korean Society of Mechanical Engineers
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• v.18 no.10
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• pp.2501-2513
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• 1994

In this paper, a compact, light-weight, universal, spherical 3-degree-of-freedom, parallel-structured manual controller with high reflecting-force capability is implemented. First, the position analysis, kinematic modeling and analysis, force reflecting transformation, and applied force control schemes for a parallel structured 3 degree-of-freedom spherical system have been described. Then, a brief description of the system integration, its actual implementation hardware, and its preliminary analysis results are presented. The implemented parallel 3 degree-of-freedom spherical module is equipped with high gear-ratio reducers, and the friction due to the reducers is minimized by employing a force control algorithm, which results in a "power steering" effect for enhanced smoothness and transparency (for compactness and reduced weight).d weight).