• The Journal of the Korea Contents Association
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• v.18 no.7
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• pp.495-502
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• 2018

The advent of deep learning technology has made rapid progress in handwritten letter recognition in many languages. Handwritten Chinese recognition has improved to 97.2% accuracy while handwritten Japanese recognition approached 99.53% percent accuracy. Hanguel handwritten letters have many similar characters due to the characteristics of Hangeul, so it was difficult to recognize the letters because the number of data was small. In the handwritten Hanguel recognition using Hybrid Learning, it used a low layer model based on lenet and showed 96.34% accuracy in handwritten Hanguel database PE92. In this paper, 98.64% accuracy was obtained by organizing deep CNN (Convolution Neural Network) in handwritten Hangeul recognition. We designed a new network for handwritten Hangeul data based on GoogLenet without using the data augmentation or the multitasking techniques used in Hybrid learning.

• Journal of Korea Multimedia Society
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• v.18 no.6
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• pp.723-733
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• 2015

High availability is of utmost importance in real-time embedded systems. Temporary failures due to software or hardware faults should not result in a system crash. To achieve high availability, embedded systems typically use a combination of hardware and software techniques. A watchdog timer is a hardware component in embedded microprocessors that can be used to automatically reset the processor if software anomalies are detected. The embedded system relies on a single watchdog timer, however, can be permanently disabled if the timer is not properly configured, e.g. falling into an indefinite loop. STM32F4 provides two different types of watchdog timer in terms of timing accuracy and robustness. In this paper, we propose a hybrid approach, called long-tail watchdog timer, to utilize both timers to achieve self-reliance in embedded systems even though one of timers fails. Experimental results confirm that the proposed approach successfully handles various failure scenarios and present performance comparisons between single watchdog timer and hybrid approach in terms of configuration parameters of watchdog timers in STM32F4, counter value and window size.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2000.10a
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• pp.499-503
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• 2000

The use of Multiple-Valued FFT(Fast fourier Transform) is extended from binary to multiple-valued logic(MVL) circuits. A multiple-valued FFT circuit can be implemented using current-mode CMOS techniques, reducing the transitor, wires count between devices to half compared to that of a binary implementation. For adder processing in FFT, We give the number representation using such redundant digit sets are called redundant positive-digit number representation and a Redundant set uses the carry-propagation-free addition method. As the designed Multiple-valued FFT internally using PD(positive digit) adder with the digit set 0,1,2,3 has attractive features on speed, regularity of the structure and reduced complexities of active elements and interconnections. for the mutiplier processing, we give Multiple-valued LUT(Look up table)to facilitate simple mathmatical operations on the stored digits. Finally, Multiple-valued 8point FFT operation is used as an example in this paper to illuatrates how a multiple-valued FFT can be beneficial.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.2
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• pp.85-92
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• 2009

This paper proposes a full-search block-matching motion estimation circuit with hybrid architecture combining systolic arrays and adder trees for an MPEG-4 encoder. The proposed circuit uses systolic arrays for motion estimation with a small number of clock cycles and adder trees to reduce required circuit resources. The interpolation circuit for 1/2 pixel motion estimation consists of six adders, four subtracters and ten registers. We improved the circuit performance by resource sharing and efficient scheduling techniques. We described the motion estimation circuit for integer and 1/2 pixels at RTL in Verilog HDL. The logic-level circuit synthesized by using 130nm standard cell library contains 218,257 gates and can process 94 D1($720{\times}480$) image frames per second.

• Nuclear Medicine and Molecular Imaging
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• v.43 no.3
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• pp.159-164
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• 2009

Coronary artery disease is on the rise over the world. Myocardial perfusion SPECT is a well established technique to detect coronary artery disease and to assess left ventricular function. In addition, it has the unique ability to predict the prognosis of the patients. Moreover, the application of ECC-gated images provided the quantitatve data and improved the accuracy. This approach has been proved to be cost-effective and suitable for the emerging economies as well as developed countries. However, the utilization of nuclear cardiology procedures vary widely considering the different countries and region of the world. Korea exits 2-3 times less utilization than Japan, and 20 times than the United States. Recently, with the emerging of new technology, namely cardiac CT, cardiac MR and stress echocardiography, the clinical usefulness of nuclear cardiology has been called in question and its role has been redefined. For the proper promotion of nuclear cardiology, special educations should be conducted since the nuclear cardiology has the contact points between nuclear medicine and cardiology. Several innovations are in horizon which will impact the diagnostic accuracy as well as imaging time and cost savings. Development of new tracers, gamma camera technology and hybrid systems will open the new avenue in cardiac imaging. The future of nuclear cardiology based on molecular imaging is very exciting. The newly defined biologic targets involving atherosclerosis and vascular vulnerability will allow the answers for the key clinical questions. Hybrid techniques including SPECT/CT indicate the direction in which clinical nuclear cardiology may be headed in the immediate future. To what extent nuclear cardiology will be passively absorbed by other modalities, or will actively incorporate other modalities, is up to the present and next generation of nuclear cardiologists.

• Smart Structures and Systems
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• v.25 no.5
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• pp.605-617
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• 2020

The existence of damages in structures causes changes in the physical properties by reducing the modal parameters. In this paper, we develop a two-stages approach based on normalized Modal Strain Energy Damage Indicator (nMSEDI) for quick applications to predict the location of damage. A two-dimensional IsoGeometric Analysis (2D-IGA), Machine Learning Algorithm (MLA) and optimization techniques are combined to create a new tool. In the first stage, we introduce a modified damage identification technique based on frequencies using nMSEDI to locate the potential of damaged elements. In the second stage, after eliminating the healthy elements, the damage index values from nMSEDI are considered as input in the damage quantification algorithm. The hybrid of Teaching-Learning-Based Optimization (TLBO) with Artificial Neural Network (ANN) and Particle Swarm Optimization (PSO) are used along with nMSEDI. The objective of TLBO is to estimate the parameters of PSO-ANN to find a good training based on actual damage and estimated damage. The IGA model is updated using experimental results based on stiffness and mass matrix using the difference between calculated and measured frequencies as objective function. The feasibility and efficiency of nMSEDI-PSO-ANN after finding the best parameters by TLBO are demonstrated through the comparison with nMSEDI-IGA for different scenarios. The result of the analyses indicates that the proposed approach can be used to determine correctly the severity of damage in beam structures.

• The Korean Journal of Applied Statistics
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• v.21 no.3
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• pp.399-411
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• 2008

Today, the statistical survey has been carried out variously for the decision-making and administration of the organization. We use the different items in the statistical survey according to the purpose of study. Currently, Gyeongnam province is executing the social index survey to the provincials every year. But, this survey has the limit of the analysis as execution of the different survey per 3 year cycles. The solution for this problem is data fusion technique. Data fusion is generally defined as the use of techniques that collect to combine data including multiple sources in order to raise the quality of information. But, data fusion doesn't mean the ultimate result. Therefor, efficient analysis for the fused data is also important. In this study, we suggest the application methodology of neural network by latent variable through the fused data in statistical survey.

• The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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• v.4 no.1
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• pp.38-43
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• 1993

A Hybrid Finite Element Method(HFEM) is applied to solve the electrormagnetic scattering from multi-layered dielectric cylinders. An unbounde region is divided into local boundary regions where a practical differential equation solution is obtained, with the remaining unbounded region represented by a boundary integral equation. If sources, media inhomogeneities, and anisotropies are local, a surgace may be defined to enclose them. Therefore the integral region so defined is bounded, and differential techniques may be used there. Also, in the re- maining unbounded region a boundary integral equation may be formulated using only a simple free - space green's function. Therefore, The local boundary is represented by a boundary - value problem with boundary conditions and solved by the finite element method. The advantage of the proposed method is simple and efficient in the work of electromagnetic scattering. The validity of the results have been verified by comparing results of other method(boundary element method). Examples has been presented to calculate the scattered fields of lossy dielectric cylinders of arbitray cross section.

• Journal of Korea Multimedia Society
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• v.9 no.2
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• pp.244-254
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• 2006

This paper presents an efficient hybrid technique to compact the trie indexing the huge forward table small enough to be stored into cache for speeding up IP lookup. It combines two techniques, an encoding scheme called bit-map and a controlled-prefix expanding scheme to replace slow memory search with few fast-memory accesses and computations. For compaction, the bit-map represents each index and child pointer with one bit respectively. For example, when one node denotes n bits, the bit-map gives a high compression rate by consumes $2^{n-1}$ bits for $2^n$ index and child link pointers branched out of the node. The controlled-prefix expanding scheme determines the number of address bits represented by all root node of each trie's level. At this time, controlled-prefix scheme use a dynamic programming technique to get a smallest trie memory size with given number of trie's level. This paper proposes standard that can choose suitable trie structure depending on memory size of system and the required IP lookup speed presenting optimal memory size and the lookup speed according to trie level number.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.3
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• pp.571-578
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• 2012

In this paper, we propose two main points. The first is the constraint for logic synthesis, and the second is an efficient logic synthesis method. Logic synthesis is a process to obtain the gate-level netlist from RTL (register transfer level) codes using logic mapping and optimization with the specified constraints. The result of logic synthesis is tightly dependent on constraint and logic synthesis method. Since the size and timing can be dramatically changed by these, we should precisely consider them. In this paper, we present the considering items in the process of logic synthesis by using our experience and experimental results. The proposed techniques was applied to a circuit with the hardware resource of about 650K gates. The synthesis time for the hybrid method was reduced by 47% comparing the bottom-up method and It has better timing property about slack than top-down method.