• Journal of the Korean institute of surface engineering
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• v.25 no.4
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• pp.189-206
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• 1992

The effect of activation and electroless nickel plating conditions on contact properties was investi-gated for selective electroless nickel plating of Si wafers in order to obtain an optimum condition of con-tact hole filling. According to RCA prosess, p-type silicon (100) surface was cleaned out and activated. The effects of temperature, DMAB concentration, time, and strirring were investigated for activation of p-type Si(100) surface. The optimal activation condition was 0.2M HF, 1mM PdCl2, 2mM EDTA,$ 70^{\circ}C$, and 90sec under ultrasonic vibration. In electroless nickel plating, the effect of temperature, DMAB concentra-tion, pH, and plating time were studied. The optimal plating condition found was 0.10M NiSO4.H2O, 0.11M Citrate, pH 6.8, $60^{\circ}C$, 30minutes. The contact resistance of films was comparatively low. It took 30minutes to obtain 1$\mu\textrm{m}$ thick film with 8mM DMAB concentration. The film surface roughness was improved with decreasing temperature and decreasing pH of the plating solution. The best quality of the film was obtained at the condition of temperature $60^{\circ}C$ and pH 6.0. The micro-vickers hardness of film was about 800Hv. Plating rate of nickel on the hole pattern was slower than that of nickel on the line pattern.

• Current Photovoltaic Research
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• v.6 no.2
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• pp.43-48
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• 2018

The traditional silicon heterojunction solar cells consist of intrinsic amorphous silicon to prevent recombination of the silicon surface and doped amorphous silicon to transport the photo-generated electrons and holes to the electrode. Back contact solar cells with silicon heterojunction exhibit very high open-circuit voltages, but the complexity of the process due to form the emitter and base at the backside must be addressed. In order to solve this problem, the structure, manufacturing method, and new materials enabling the carrier selective contact (CSC) solar cell capable of achieving high efficiency without using a complicated structure have recently been actively developed. CSC solar cells minimize carrier recombination on metal contacts and effectively transfer charge. The CSC structure allows very low levels of recombination current (eg, Jo < 9fA/cm2), thereby achieves high open-circuit voltage and high efficiency. This paper summarizes the core technology of CSC solar cell, which has been spotlighted as the next generation technology, and is aiming to speed up the research and development in this field.

• Current Photovoltaic Research
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• v.11 no.2
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• pp.39-43
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• 2023

Carrier-selective contacts (CSCs) solar cells are considerably attractive on highly efficient crystalline silicon heterojunction (SHJ) solar cells due to their advantages of high thermal tolerance and the simple fabrication process. CSCs solar cells require a hole selective contact (HSC) layer that selectively collects only holes. In order to selectively collect holes, it must have a work function characteristic of 5.0 eV or more when contacted with n-type Si. The VO_x, NiO_x, and CuI_x thin films were fabricated and analyzed respectively to confirm their potential usage as a hole-selective contact (HSC) layer. All thin films showed characteristics of band-gap engergy > 3.0 eV, work function > 5.0 eV and minority carrier lifetime > 1.5 ms.

• Proceedings of the Materials Research Society of Korea Conference
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• 1992.05b
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• pp.26-27
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• 1992

The effect of activation and electroless nickel plating conditions on contact properties were investigated for selective electroless nickel plating of Si farers in order to obtain an optimum condition of contact hole filling. According to RCA prosess, p-type si 1 icon (100) surface was cleaned out and activated. The effects of temperture, DMAB concentration, time, and stirring iwere investigated for activation of p-type Si(100) surface. The optimal activation condition obtained was 0.5M HF, 1mM PdCl$_2$, 2mM EDTA, 7$0^{\circ}C$, 90sec under ultrasonic vibration. In electroless nickel plating, the effect of temperature, DMAB concentration, pH, and plating ti me were studied. The optimal plating condition found was 0. 10M NiS0$_4$.$H_2O$, 0.lIM Citrate, pH 6.8, 6$0^{\circ}C$, 30 minutes. The contact resistence of fi]ms wascomparatively low. It took 30 minutes to obtain 1$\mu$m thick film with 8$\mu$M DMAB concentration. The film surface roughness was improved with increasing temperature and decreasing pH of the plating solution. The best quality of the film was obtained with the condition of temperature 6$0^{\circ}C$ and pH 6.8. The micro-victors hardness of film was about 600Hv and was decreased wi th increasing particle size of plating layer.

• Korean Journal of Materials Research
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• v.29 no.5
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• pp.322-327
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• 2019

Hole carrier selective MoOx film is obtained by atomic layer deposition(ALD) using molybdenum hexacarbonyl[$Mo(CO)_6$] as precursor and ozone($O_3$) oxidant. The growth rate is about 0.036 nm/cycle at 200 g/Nm of ozone concentration and the thickness of interfacial oxide is about 2 nm. The measured band gap and work function of the MoOx film grown by ALD are 3.25 eV and 8 eV, respectively. X-ray photoelectron spectroscopy(XPS) result shows that the $Mo^{6+}$ state is dominant in the MoOx thin film. In the case of ALD-MoOx grown on Si wafer, the ozone concentration does not affect the passivation performance in the as-deposited state. But, the implied open-circuit voltage increases from $576^{\circ}C$ to $620^{\circ}C$ at 250 g/Nm after post-deposition annealing at $350^{\circ}C$ in a forming gas ambient. Instead of using a p-type amorphous silicon layer, high work function MoOx films as hole selective contact are applied for heterojunction silicon solar cells and the best efficiency yet recorded (21 %) is obtained.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.136.2-136.2
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• 2015

반도체 제조는 chip의 성능 향상 및 단가 하락을 위해 지속적으로 pattern size가 nano size로 감소해 왔고, capacitor 용량은 증가해 왔다. 이러한 현상은 contact hole의 aspect ratio를 지속적으로 증가시킨바, 그에 따라 최적의 HARC (high aspect ratio contact)을 확보하는 적합한 dry etch process가 필수적이다. 그러나 HARC dry etch process는 많은 critical plasma properties 에 의존하는 매우 복잡한 공정이다. 따라서, critical plasma properties를 적절히 조절하여 higher aspect ratio, higher etch selectivity, tighter critical dimension control, lower P2ID과 같은 plasma characteristics을 확보하는 것이 요구된다. 현재 critical plasma properties를 제어하기 위해 다양한 plasma etching 방법이 연구 되어왔다. 이 중 plasma를 낮은 kHz의 frequency에서 on/off 하는 pulsed plasma etching technique은 nanoscale semiconductor material의 etch 특성을 효과적으로 향상 시킬 수 있다. 따라서 본 실험에서는 dual-frequency capacitive coupled plasma (DF-CCP)을 사용하여 plasma operation 동안 duty ratio와 pulse frequency와 같은 pulse parameters를 적용하여 plasma의 특성을 각각 제어함으로써 etch selectivity와 uniformity를 향상 시키고자 하였다. Selective SiO2 contact etching을 위해 top electrode에는 60 MHz pulsed RF source power를, bottom electrode에는 2MHz pulse plasma를 인가하여 synchronously pulsed dual-frequency capacitive coupled plasma (DF-CCP)에서의 plasma 특성과 dual pulsed plasma의 sync. pulsing duty ratio의 영향에 따른 etching 특성 등을 연구 진행하였다. 또한 emissive probe를 통해 전자온도, OES를 통한 radical 분석으로 critical Plasma properties를 분석하였고 SEM을 통한 etch 특성분석과 XPS를 통한 표면분석도 함께 진행하였다. 그 결과 60%의 source duty percentage와 50%의 bias duty percentage에서 가장 향상된 etch 특성을 얻을 수 있었다.

• Journal of Korea Foundry Society
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• v.21 no.5
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• pp.290-295
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• 2001

We fabricated test samples containing various shape elements and surface roughness checking points for the jewelry cast master patterns by employing the 3D computer aided design (CAD), selective laser sintering (SLS) rapid prototype (RP) with the DuraForm powders. We varied the alignment angle from $0^{\circ}$ to $10^{\circ}$ at a given layer thickness of 0.08 and 0.1mm, respectively, in RP operation. Dimensions of the shape elements as well as values of surface roughness are characterized by an optical microscope and a contact-scanning profilometer. Surface roughness values of the top and vertical face increased as the alignment angle increased, while the other roughness values and shape elements variation were not depending on the alignment angle. The resolution of the shape realization was enhanced as the layer thickness became smaller. The minimum diameter of the hole, common in jewelry design, was 1.2 mm, and the shrinkage became 12% at the 1.6 mm-diameter hole, Our results implied that we face down the proposed design elements with $0^{\circ}$ alignment angle, and consider the shrinkage effect of each shape element in DuraForm RP jewelry modeling.

• Korean Journal of Materials Research
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• v.30 no.12
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• pp.660-665
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• 2020

Silicon heterojunction solar cells can achieve high conversion efficiency with a simple structure. In this study, we investigate the passivation characteristics of VOx thin films as a hole-selective contact layer using ALD (atomic layer deposition). Passivation characteristics improve with iVoc (implied open-circuit voltage) of 662 mV and minority carrier lifetime of 73.9 µs after post-deposition annealing (PDA) at 100 ℃. The improved values are mainly attributed to a decrease in carbon during the VOx thin film process after PDA. However, once it is annealed at temperatures above 250 ℃ the properties are rapidly degraded. X-ray photoelectron spectroscopy is used to analyze the chemical states of the VOx thin film. As the annealing temperature increases, it shows more formation of SiOx at the interface increases. The ratio of V5+ to V4+, which is the oxidation states of vanadium oxide thin films, are 6:4 for both as-deposition and annealing at 100 ℃, and 5:5 for annealing at 300 ℃. The lower the carbon content of the ALD VOx film and the higher the V5+ ratio, the better the passivation characteristics.

• Journal of the Korean institute of surface engineering
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• v.24 no.4
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• pp.206-214
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• 1991

In the basic study of selective electroless Ni plating of Si wafers, plating rate and physical properties are investigated to obtain optimum conditions of contact hole filling. Si wafers are excellently activated in the concentration of 0.5M IF, 1mM PdCl2, 2mM EDTA at $70^{\circ}C$, 90sec. The optimum condition of Ni-B deposition on p-type Si wafers is 0.1M NiSO4, 0.11M Citrate, $70^{\circ}C$, pH6.8, 8mM DMAB. The main factor in the sheet resistences variation of films is amorphous and on heat treating matrix was transformed into a stable phase (Ni+Ni3B) at $300-400^{\circ}C$. But pH or DMAB concentration in the plating solution doesn't play role of heat-affected phase change.

• Current Photovoltaic Research
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• v.1 no.1
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• pp.17-26
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• 2013

In contrast to conventional crystalline cells, back-contact solar cells feature high efficiencies, simpler module assembly, and better aesthetics. The highest commercialized cell and module efficiency was recorded by n-type back-contact solar cells. However, the mainstream PV industry uses a p-type substrate instead of n-type due to the high costs and complexity of the manufacturing processes in the case of the latter. P-type back-contact solar cells such as metal wrap-through and emitter wrap-through, which are inexpensive and compatible with the current PV industry, have consequently been developed. In this paper the characteristics of EWT (emitter wrap-through) solar cells and their status and prospects for development are discussed.