• Title/Summary/Keyword: high-speed Internet

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Study of Efficient Network Structure for Real-time Image Super-Resolution (실시간 영상 초해상도 복원을 위한 효율적인 신경망 구조 연구)

  • Jeong, Woojin;Han, Bok Gyu;Lee, Dong Seok;Choi, Byung In;Moon, Young Shik
    • Journal of Internet Computing and Services
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    • v.19 no.4
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    • pp.45-52
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    • 2018
  • A single-image super-resolution is a process of restoring a high-resolution image from a low-resolution image. Recently, the super-resolution using the deep neural network has shown good results. In this paper, we propose a neural network structure that improves speed and performance over conventional neural network based super-resolution methods. To do this, we analyze the conventional neural network based super-resolution methods and propose solutions. The proposed method reduce the 5 stages of the conventional method to 3 stages. Then we have studied the optimal width and depth by experimenting on the width and depth of the network. Experimental results have shown that the proposed method improves the disadvantages of the conventional methods. The proposed neural network structure showed superior performance and speed than the conventional method.

Design of Advanced Multiplicative Inverse Operation Circuit for AES Encryption (AES 암호화를 위한 개선된 곱셈 역원 연산기 설계)

  • Kim, Jong-Won;Kang, Min-Sup
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.20 no.4
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    • pp.1-6
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    • 2020
  • This paper proposes the design of an advanced S-Box for calculating multiplicative inverse in AES encryption process. In this approach, advanced S-box module is first designed based on composite field, and then the performance evaluation is performed for S-box with multi-stage pipelining architecture. In the proposed S-Box architecture, each module for multiplicative inverse is constructed using combinational logic for realizing both small-area and high-speed. Through logic synthesis result, the designed 3-stage pipelined S-Box shows speed improvement of about 28% compared to the conventional method. The proposed advanced AES S-Box is performed modelling at the mixed level using Verilog-HDL, and logic synthesis is also performed on Spartan 3s1500l FPGA using Xilinx ISE 14.7 tool.

An Efficient Implementation of Mobile Raspberry Pi Hadoop Clusters for Robust and Augmented Computing Performance

  • Srinivasan, Kathiravan;Chang, Chuan-Yu;Huang, Chao-Hsi;Chang, Min-Hao;Sharma, Anant;Ankur, Avinash
    • Journal of Information Processing Systems
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    • v.14 no.4
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    • pp.989-1009
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    • 2018
  • Rapid advances in science and technology with exponential development of smart mobile devices, workstations, supercomputers, smart gadgets and network servers has been witnessed over the past few years. The sudden increase in the Internet population and manifold growth in internet speeds has occasioned the generation of an enormous amount of data, now termed 'big data'. Given this scenario, storage of data on local servers or a personal computer is an issue, which can be resolved by utilizing cloud computing. At present, there are several cloud computing service providers available to resolve the big data issues. This paper establishes a framework that builds Hadoop clusters on the new single-board computer (SBC) Mobile Raspberry Pi. Moreover, these clusters offer facilities for storage as well as computing. Besides the fact that the regular data centers require large amounts of energy for operation, they also need cooling equipment and occupy prime real estate. However, this energy consumption scenario and the physical space constraints can be solved by employing a Mobile Raspberry Pi with Hadoop clusters that provides a cost-effective, low-power, high-speed solution along with micro-data center support for big data. Hadoop provides the required modules for the distributed processing of big data by deploying map-reduce programming approaches. In this work, the performance of SBC clusters and a single computer were compared. It can be observed from the experimental data that the SBC clusters exemplify superior performance to a single computer, by around 20%. Furthermore, the cluster processing speed for large volumes of data can be enhanced by escalating the number of SBC nodes. Data storage is accomplished by using a Hadoop Distributed File System (HDFS), which offers more flexibility and greater scalability than a single computer system.

GP-GPU based Parallelization for Urban Terrain Atmospheric Model CFD_NIMR (도시기상모델 CFD_NIMR의 GP-GPU 실행을 위한 병렬 프로그램의 구현)

  • Kim, Youngtae;Park, Hyeja;Choi, Young-Jeen
    • Journal of Internet Computing and Services
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    • v.15 no.2
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    • pp.41-47
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    • 2014
  • In this paper, we implemented a CUDA Fortran parallel program to run the CFD_NIMR model on GP-GPU's, which simulates air diffusion on urban terrains. A GP-GPU is graphic processing unit in the form of a PCI card, and a general calculation accelerator to perform a large amount of high speed calculations with low cost and electric power. The GP-GPU gives performance enhancement of speed by 15 times to compare the Nvidia Tesla C1060 GPU with Intel XEON 2.0 GHz CPU. In addition, the program on a GP-GPU shows efficient performance compared to an MPI parallel program on multiple CPU's. It is expected that a proposed programming method on the GP-GPU parallel program can be used for numerical models with a similar structure.

Proposal of 3D Graphic Processor Using Multi-Access Memory System (Multi-Access Memory System을 이용한 3D 그래픽 프로세서 제안)

  • Lee, S-Ra-El;Kim, Jae-Hee;Ko, Kyung-Sik;Park, Jong-Won
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.19 no.4
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    • pp.119-128
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    • 2019
  • Due to the nature of the 3D graphics processor system, many mathematical calculations are required and parallel processing research using GPU (Graphics Processing Unit) is being performed for high-speed processing. In this paper, we propose a 3D graphics processor using MAMS, a parallel processor that does not use cache memory, to solve the GPU problem of increasing bandwidth caused by cache memory miss and the problem that 3D shader processing speed is not constant. The 3D graphics processor using MAMS proposed in this paper designed Vertex shader, Pixel shader, Tiling and Rasterizing structure using DirectX command analysis, the FPGA(Xilinx Virtex6@100MHz) board for MAMS was constructed and designed using Verilog. We compared the processing time of the developed FPGA (100Mhz) and nVidia GeForce GTX 660 (980Mhz), the processing time using GTX 660 was not constant and suing MAMS was constant.

Development of The Safe Driving Reward System for Truck Digital Tachograph using Hyperledger Fabric (하이퍼레저 패브릭을 이용한 화물차 디지털 운행기록 단말기의 안전운행 보상시스템 구현)

  • Kim, Yong-bae;Back, Juyong;Kim, Jongweon
    • Journal of Internet Computing and Services
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    • v.23 no.3
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    • pp.47-56
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    • 2022
  • The safe driving reward system aims to reduce the loss of life and property by reducing the occurrence of accidents by motivating safe driving and encouraging active participation by providing direct reward to vehicle drivers who have performed safe driving. In the case of the existing digital tachograph, the goal is to limit dangerous driving by recording the driving status of the vehicle whereas the safe driving reward system is a support measure to increase the effect of accident prevention and induces safe driving with financial reward when safe driving is performed. In other words, in an area where accidents due to speeding are high, direct reward is provided to motivate safe driving to prevent traffic accidents when safe driving instructions such as speed compliance, maintaining distance between vehicles, and driving in designated lanes are performed. Since these safe operation data and reward histories must be managed transparently and safely, the reward evidences and histories were constructed using the closed blockchain Hyperledger Fabric. However, while transparency and safety are guaranteed in the blockchain system, low data processing speed is a problem. In this study, the sequential block generation speed was as low as 10 TPS(transaction per second), and as a result of applying the acceleration function a high-performance network of 1,000 TPS or more was implemented.

Proposal for Research Model of High-Function Patrol Robot using Integrated Sensor System (통합 센서 시스템을 이용한 고기능 순찰 로봇의 연구모델 제안)

  • Byeong-Cheon Yoo;Seung-Jung Shin
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.24 no.3
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    • pp.77-85
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    • 2024
  • In this dissertation, a we designed and implemented a patrol robot that integrates a thermal imaging camera, speed dome camera, PTZ camera, radar, lidar sensor, and smartphone. This robot has the ability to monitor and respond efficiently even in complex environments, and is especially designed to demonstrate high performance even at night or in low visibility conditions. An orbital movement system was selected for the robot's mobility, and a smartphone-based control system was developed for real-time data processing and decision-making. The combination of various sensors allows the robot to comprehensively perceive the environment and quickly detect hazards. Thermal imaging cameras are used for night surveillance, speed domes and PTZ cameras are used for wide-area monitoring, and radar and LIDAR are used for obstacle detection and avoidance. The smartphone-based control system provides a user-friendly interface. The proposed robot system can be used in various fields such as security, surveillance, and disaster response. Future research should include improving the robot's autonomous patrol algorithm, developing a multi-robot collaboration system, and long-term testing in a real environment. This study is expected to contribute to the development of the field of intelligent surveillance robots.

Performance Analysis of the Visible Light Communication System based on MIMO under Various Interference environments (다양한 간섭환경에서 MIMO기반 VLC 시스템의 성능 분석)

  • Lee, Byung-Jin;Kim, Yong-Won;Kim, Kyung-Seok
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.13 no.3
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    • pp.1-7
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    • 2013
  • We perform simulation. It is that LED panels is fixed and moving the terminal with PD in order to analyze the performance of visible-light wireless communication system based on MIMO under variety of the interference environment. And, based on the technology MIMO, we analyzed whether the interference caused by external light to give what effect changes in the quality of the communication channel. The distortion due to time delay in channel transmission must be compensated by using the equalizer. Especially, use of equalizer is need absolutely as data rate becomes high speed. Therefore, in this paper, the system VLC, were analyzed BER performance using channel equalization.

An Efficient Channel Sounding Method for WPAN System (무선 PAN 시스템을 위한 효율적인 채널 사운딩 기법)

  • Cho, Ju-Phil
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.8 no.3
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    • pp.9-14
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    • 2008
  • In this paper, we propose the channel sounding scheme which is made for ideal communication between some application as well as the short distance of high speed data transmission in MIMO-OFDM system for Wireless PAN. This method is able to perceive the duration of the impulse response through the delaying of power delay profile, modeled a power delay profile which has an attenuate characteristic, and obtained the coefficient of channel response by ML (maximum likelihood). Through the amplitudes, phases and delays associated with each multipath component which were acquired from this channel sounding scheme, we can describe the wave propagation characteristics of channels between the transmitter and receiver so that the receiver could enhance not only the reliability but also the ability of communication link.

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An Architecture of Reconfigurable Transceiver for OFDM/TDD based Portable Internet Service System

  • Jung Jae Ho;Kim Jun Hyung;Kim Sung Min;Choi Hyun Chul;Lee Kwang Chun
    • Proceedings of the IEEK Conference
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    • 2004.08c
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    • pp.667-670
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    • 2004
  • In this paper, we have presented the improved IF transceiver architecture and the implementation and experimental results on re-configurable transceiver based on digital IF for multiple wideband OFDM/TDD base stations for high-speed portable internet-service in which is issued Korea. The implemented IF transceiver has been designed to support multiple frequency allocations and multiple standards by only modifying the programmable software not its hardware like as the software-defined-radio concept. Also, the digital complex quadrature modulation technique has been used for the digital IF transmitter, which is able to combine multiple frequency bands in digital processing block not RF block and to reject the image frequency signals. And the bandpass sampling technique has been used for the digital IF receiver to reduce the sampling rate of ADC. This paper has shown the experiment results on the frequency response and constellation on the base-station implemented using the modified IEEE 802.16a/e physical layer channel structure based on OFDM/TDD.

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