• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.136-139
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• 2004

This paper presents a buck circuit topology of high-frequency with a single switching element. It solved the problem which arised from hard-switching in high-frequency using a resonant snubber and operating under the principle of ZCS turn-on and ZVS turn-off commutation schemes. In the existing circuit, it has the voltage stress which is twice of input voltage in free-wheeling diode. But in the proposed circuit, it has voltage stress which is lower than input voltage with modifing a location of free-wheeling diode. In this paper, it explained the circuit operation of each mode and confirmed the waveform of each mode with simulation result. Also the experiment result verified the simulation waveform and compared the existing voltage stress of free-wheeling diode with the proposed voltage stress of that. Moreover, it compares and analyzes the proposed circuit's efficiency with the hard-switching circuit's efficiency according to the change of load current.

• 한국결정성장학회지
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• 제10권6호
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• pp.412-417
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• 2000

High electric field stressed trap distributions were investigated in the thin silicon oxide of polycrystalline silicon gate metal oxide semiconductor capacitors. The transient currents associated with the off time of stressed voltage were used to measure the density and distribution of high voltage stress induced traps. The transient currents were due to the discharging of traps generated by high stress voltage in the silicon oxides. The trap distributions were relatively uniform near both cathode and anode interface in polycrystalline silicon gate metal oxide semiconductor devices. The stress generated trap distributions were relatively uniform the order of $10^{11}$~$10^{12}$ [states/eV/$\textrm{cm}^2$] after a stress. The trap densities at the oxide silicon interface after high stress voltages were in the $10^{10}$~$10^{13}$ [states/eV/$\textrm{cm}^2$]. It was appeared that the transient current that flowed when the stress voltages were applied to the oxide was caused by carriers tunneling through the silicon oxide by the high voltage stress generated traps.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제54권11호
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• pp.540-546
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• 2005

This paper presents a boost circuit topology driving in high - frequency It solves the problem which arised from hard-switching in high-frequency using a period of resonant circuit and operating under the principle of ZCS turn-on and ZCZVS turn-off commutation schemes. In the existing circuit, it has the high voltage and current stress in free- wheeling diode. But in the proposed circuit, it has voltage and current stress which is lower than voltage and current stress of existing circuit with modifing a location of free-wheeling diode. In this paper, it explained the circuit operation of each mode and the waveform of each mode. Also the experiment results compare the voltage and current stress of free-wheeling diode in the existing circuit with the voltage and current stress of that in the proposed circuit. Moreover, it compares and analyzes the proposed circuit's efficiency with the existing circuit's efficiency according to the change of load current.

• Journal of Electrical Engineering and Technology
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• 제12권1호
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• pp.189-197
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• 2017

This paper elaborates two novel proposed topologies (type-I and type-II) of the high step-up DC-DC converter using switched inductor and voltage multiplier cell. The advantages of these proposed topologies are the less voltage stress on semiconductor devices, low device count, high power conversion efficiency, high switch utilization factor and high diode utilization factor. We analyze the Type-II topologies operating principle and mathematical analysis in detail in continuous conduction mode. High-intensity discharge lamp for the automotive application can use the derived topologies. The proposed converters give better performance when compared to the existing types. Also, it is found that the proposed type-II converter has relatively higher voltage gain compared to the type-I converter. A 40 W, 12 V input voltage and 72 V output voltage has developed for the type-II converter and the performances are validated.

• 전력전자학회논문지
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• 제25권2호
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• pp.133-141
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• 2020

The use of high-gain-voltage step-up converters for distributed power generation systems is being popularized because of the need for new energy generation and power conversion technologies. In this study, a new constructed high-gain-boost DC-DC converter was proposed to coordinate low voltage output DC sources, such as PV or fuel cell systems, with high DC bus (380 V) lines. Compared with traditional boost DC-DC converters, the proposed converter can create higher gain and has wider input voltage range and lower voltage stress for power semiconductors and passive elements. Moreover, the proposed topology produces multilevel DC voltage output, which is the main advantage of the proposed topology. Steady-state analysis in continuous conduction mode of the proposed converter is discussed in detail. The practicability of the proposed DC-DC converter is presented by experimental results with a 300 W prototype converter.

• Journal of Electrical Engineering and Technology
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• 제12권3호
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• pp.1187-1194
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• 2017

In this paper, a high step-up DC-DC PWM converter with continuous input current and low voltage stress is presented for renewable energy application. The proposed converter is composed of a boost converter integrated with an auxiliary step-up circuit. The auxiliary circuit uses an additional coupled inductor and a balancing capacitor with voltage doubler and switching capacitor technique to achieve high step-up voltage gain with an appropriate switch duty cycle. The switched capacitors are charged in parallel and discharged in series by the coupled inductor, stacking on the output capacitor. In the proposed converter, the voltage stress on the main switch is clamped, so a low voltage switch with low ON resistance can be used to reduce the conduction loss which results in the efficiency improvement. A detailed discussion on the operating principle and steady-state analyses are presented in the paper. To justify the theoretical analysis, experimental results of a 200W 40/400V prototype is presented. In addition, the conducted electromagnetic emissions are measured which shows a good EMC performance.

• 조명전기설비학회논문지
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• 제16권5호
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• pp.7-13
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• 2002

고효율 고전력 밀도를 제공하는 공진형 컨버터에 있어서 스위치에 걸리는 전압 스트레스는 입력전압의 4∼5배 정도여서, 높은 정격의 소자를 필요로 하기 때문에 전도손실을 증가시킨다. 본 논문에서는 이러한 문제점을 해결하기 위해 제안했던 교번으로 동작하는 포워드 다중공진형 컨버터에 적용한 회로 형태를 다른 컨버터에 적용한 예를 제시하였다. 그리고 제안한 AT포워드 다중공진형 컨버터의 루프 이득 특성을 알아보기 위해 HP4194A 네트워크 해석기를 이용해 실험적으로 측정한 결과에 대해 고찰하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1999년도 춘계학술대회 논문집
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• pp.461-464
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• 1999

This study has been investigated that traps generated inside of the oxide and at the oxide interfaces by the stress bias voltage. The traps are charged near the cathode with negative charge and charged near the anode with positive charge. The charge state of the traps can easily be changed by application of low voltages after the stress high voltage. These trap generation involve either electron impact ionization processes or high field generation processes. It determined to the relative traps locations inside the oxides ranges from 113.4$\AA$ to 814$\AA$ with capacitor areas of 10$^{-3}$ $\textrm{cm}^2$ . The oxide charge state of traps generated by the stress high voltage contain either a positive or a negative charge.

• Journal of Power Electronics
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• 제9권3호
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• pp.335-342
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• 2009

The Z-source inverter (ZSI) provides unique features such as the ability to boost dc voltage with a single stage simple structure. Although the dc capacitor voltage can be boosted by a shoot-through state, the voltage stress across the switching devices is rapidly increased, so high switching device power is required at the ZSI. In this paper, algorithms for minimizing the voltage stress are suggested. The possible operating region for obtaining a desired ac output voltage according to both the shoot-through time and active state time is investigated. The reference capacitor voltages are derived for minimizing the voltage stress at any desired ac output voltage by considering the dc input voltage. The proposed methods are carried out through the simulation studies and experiments with 32-bit DSP.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 하계학술대회 논문집 Vol.4 No.1
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• pp.428-431
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• 2003

In this paper, the stress induced leakage currents of thin silicon oxides is investigated in the ULSI implementation with nano structure transistors. The stress and transient currents associated with the on and off time of applied voltage were used to measure the distribution of high voltage stress induced traps in thin silicon oxide films. The stress and transient currents were due to the charging and discharging of traps generated by high stress voltage in the silicon oxides. The transient current was caused by the tunnel charging and discharging of the stress generated traps nearby two interfaces. The stress induced leakage current will affect data retention in electrically erasable programmable read only memories. The oxide current for the thickness dependence of stress current, transient current, and stress induced leakage currents has been measured in oxides with thicknesses between $113.4{\AA}$ and $814{\AA}$, which have the gate area 10-3cm2. The stress induced leakage currents will affect data retention and the stress current, transient current is used to estimate to fundamental limitations on oxide thicknesses.