Anode and Cathode Traps in High Voltage Stressed Silicon Oxides

고전계 인가 산화막의 애노우드와 캐소우드 트랩

This study has been investigated that traps generated inside of the oxide and at the oxide interfaces by the stress bias voltage. The traps are charged near the cathode with negative charge and charged near the anode with positive charge. The charge state of the traps can easily be changed by application of low voltages after the stress high voltage. These trap generation involve either electron impact ionization processes or high field generation processes. It determined to the relative traps locations inside the oxides ranges from 113.4$\AA$ to 814$\AA$ with capacitor areas of 10$^{-3}$ $\textrm{cm}^2$ . The oxide charge state of traps generated by the stress high voltage contain either a positive or a negative charge.