• Title/Summary/Keyword: high speed USB interface

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Development of Data Tansfer Program Using USB Interface (USB 인터페이스를 이용한 데이터 전송프로그램 개발)

  • Jeon, Se-Il;Lee, Du-Bok
    • The Transactions of the Korea Information Processing Society
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    • v.7 no.5
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    • pp.1553-1558
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    • 2000
  • The development of recent computer and communication technology has changed Automation System using communication network, and the new USB substituted with Serial Communication is already developed and now popular. In this paper, High speed data transfer system design using USB interface and communication application simulated for the situation is introduced. Base on USB, we can use additive function efficiently coped with former field device. The 'Winsock Connection USB Ternimal,' designed for hardware simulation, control the field device connected by USB, and provide the way for remote control of field device by Telnet connection through TCP/IP. That theorem can guarantee controlling direct input dta of user, and acuate function of field device using USB Packet Transmission. As a result of amy research, this communication application system identified good operation of field device with those of former field device. Another result of the experiment of hardware operation, we obtained accomplishment that the sufficient bandwidth guarantee of USB has high speed and high performance, and reduce the occupancy of system.

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Development of a Rapid Control Prototyping System Based on Matlab and USB DAQ boards (Matlab과 USB DAQ 장치를 이용한 Rapid Control Prototyping System 개발)

  • Lee, Young-Sam;Yang, Ji-Hyuk;Kim, Seuk-Yun;Kim, Won-Sik;Kwon, Oh-Kyu
    • Journal of Institute of Control, Robotics and Systems
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    • v.18 no.10
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    • pp.912-920
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    • 2012
  • In this paper, we propose a new and cost-effective RCP (Rapid Control Prototyping) system based on Matlab/Simulink and a DAQ (Data Acquisition) unit with the high speed USB communication interface. The proposed RCP system has a feature that a computer on which Simulink is running acts as a realtime controller and a DAQ unit performs data acquisition, transmission of the data to and from a computer, and the application of control data received from the computer. For its implementation, we develop 10 communication blocks each of which is constructed by using S-function. In order to increase the data communication speed and thus to reduce the sampling period of the overall control system, we propose to use a batch transfer strategy through the USB interface. The proposed RCP system has several advantages over existing methods such as good maintainability, portability due to the USB interface, low cost, and no necessity for C-code generation even though it can only be applied to control systems with moderate sampling rates. It is expected that the proposed RCP system can be useful in teaching control-related topics to undergraduate and graduate students.

Verilog Modeling of Transmission Line for USB 2.0 High-Speed PHY Interface

  • Seong, Ki-Hwan;Lim, Ji-Hoon;Kim, Byungsub;Sim, Jae-Yoon;Park, Hong-June
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.4
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    • pp.463-470
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    • 2014
  • A Verilog model is proposed for transmission lines to perform the all-Verilog simulation of high-speed chip-to-chip interface system, which reduces the simulation time by around 770 times compared to the mixed-mode simulation. The single-pulse response of transmission line in SPICE model is converted into that in Verilog model by converting the full-scale analog signal into an 11-bit digital code after uniform time sampling. The receiver waveform of transmission line is calculated by adding or subtracting the single-pulse response in Verilog model depending on the transmitting digital code values with appropriate time delay. The application of this work to a USB 2.0 high-speed PHY interface reduces the simulation time to less than three minutes with error less than 5% while the mixed-mode simulation takes more than two days for the same circuit.

A UTMI-Compatible USB2.0 Transceiver Chip Design (UTMI 표준에 부합하는 USB2.0 송수신기 칩 설계)

  • Nam Jang-Jin;Kim Bong-Jin;Park Hong-June
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.5 s.335
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    • pp.31-38
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    • 2005
  • The architecture and the implementation details of a UTMI(USB2.0 Transceiver Macrocell Interface) compatible USB2.0 transceiver chip were presented. To confirm the validation of the incoming data in noisy channel environment, a squelch state detector and a current mode Schmitt-trigger circuit were proposed. A current mode output driver to transmit 480Mbps data on the USB cable was designed and an on-die termination(ODT) which is controlled by a replica bias circuit was presented. In the USB system using plesiochronous clocking, to compensate for the frequency difference between a transmitter and a receiver, a synchronizer using clock data recovery circuit and FIFO was designed. The USB cable was modeled as the lossy transmission line model(W model) for circuit simulation by using a network analyzer measurements. The USB2.0 PHY chip was implemented by using 0.25um CMOS process and test results were presented. The core area excluding the IO pads was $0.91{\times}1.82mm^2$. The power consumptions at the supply voltage of 2.5V were 245mW and 150mW for high-speed and full-speed operations, respectively.

An Adaptive Equalizer for High-Speed Receiver using a CDR-Assisted All-Digital Jitter Measurement

  • Kim, Jong-Hoon;Lim, Ji-Hoon;Kim, Byungsub;Sim, Jae-Yoon;Park, Hong-June
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.2
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    • pp.155-167
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    • 2015
  • An adaptive equalization scheme based on all-digital jitter measurement is proposed for a continuous time linear equalizer (CTLE) preceding a clock and data recovery (CDR) in a receiver circuit for high-speed serial interface. The optimum equalization coefficient of CTLE is determined during the initial training period based on the measured jitter. The proposed circuit finds automatically the optimum equalization coefficient for CTLE with 20", 30", 40" FR4 channel at the data rate of 5 Gbps. The chip area of the equalizer including the adaptive controller is 0.14 mm2 in a $0.13{\mu}m$ process. The equalizer consumes 12 mW at 1.2 V supply during the normal operation. The adaptive equalizer has been applied to a USB3.0 receiver.

Development of Half-Mirror Interface System and Its Application for Ubiquitous Environment (유비쿼터스 환경을 위한 하프미러형 인터페이스 시스템 개발과 응용)

  • Kwon Young-Joon;Kim Dae-Jin;Lee Sang-Wan;Bien Zeungnam
    • Journal of Institute of Control, Robotics and Systems
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    • v.11 no.12
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    • pp.1020-1026
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    • 2005
  • In the era of ubiquitous computing, human-friendly man-machine interface is getting more attention due to its possibility to offer convenient services. For this, in this paper, we introduce a 'Half-Mirror Interface System (HMIS)' as a novel type of human-friendly man-machine interfaces. Basically, HMIS consists of half-mirror, USB-Webcam, microphone, 2ch-speaker, and high-speed processing unit. In our HMIS, two principal operation modes are selected by the existence of the user in front of it. The first one, 'mirror-mode', is activated when the user's face is detected via USB-Webcam. In this mode, HMIS provides three basic functions such as 1) make-up assistance by magnifying an interested facial component and TTS (Text-To-Speech) guide for appropriate make-up, 2) Daily weather information provider via WWW service, 3) Health monitoring/diagnosis service using Chinese medicine knowledge. The second one, 'display-mode' is designed to show decorative pictures, family photos, art paintings and so on. This mode is activated when the user's face is not detected for a time being. In display-mode, we also added a 'healing-window' function and 'healing-music player' function for user's psychological comfort and/or relaxation. All these functions are accessible by commercially available voice synthesis/recognition package.

Design of A High-Speed Data Transmission System for Satellite Ground Inspection Trial

  • Hao Sun;Dae-Ki Kang
    • International journal of advanced smart convergence
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    • v.12 no.4
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    • pp.26-34
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    • 2023
  • A high-speed data transmission system is designed for the ground inspection equipment of satellite measurement and control. Based on USB2.0, the system consists of interface chip CY7C68013A, programmable logic processing unit EP4CE30F23C8, analog/digital and digital/analog conversion units. The working principle of data transmission is analyzed, and the system software logic and hardware composition scheme are detailed. The system was utilized to output/capture and store specific data packets. The results show that the high-speed data transmission speed can reach 38MB/s, and the system is effective for satellite test requirements.

Analyzing the Impact of Supply Noise on Jitter in GBPS Serial Links on a Merged I/O-Core Power Delivery Network

  • Tan, Fern-Nee;Lee, Sheng Chyan
    • Journal of the Microelectronics and Packaging Society
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    • v.20 no.4
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    • pp.69-74
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    • 2013
  • In this paper, the impact of integrating large number of I/O (Input-Output) and Core power Delivery Network (PDN) on a 6 layers Flip-Chip Ball Grid Array (FCBGA) package is investigated. The impact of core induced supply noise on high-speed I/O interfaces, and high-speed I/O interface's supply noise coupling to adjacent high-speed I/O interfaces' jitter impact are studied. Concurrent stress validation software is used to induce SSO noise on each individual I/O interfaces; and at the same time; periodic noise is introduced from Core PDN into the I/O PDN domain. In order to have the maximum coupling impact, a prototype package is designed to merge the I/O and Core PDN as one while impact on jitter on each I/O interfaces are investigated. In order to understand the impact of the Core to I/O and I/O to I/O noise, the on-die noise measurements were measured and results were compared with the original PDN where each I/O and Core PDN are standalone and isolated are used as a benchmark.

Implementation of an Embedded System for Image Tracking Using Web Camera (ICCAS 2005)

  • Nam, Chul;Ha, Kwan-Yong;;Kim, Hie-Sik
    • 제어로봇시스템학회:학술대회논문집
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    • 2005.06a
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    • pp.1405-1408
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    • 2005
  • An embedded system has been applied to many fields including households and industrial sites. In the past, user interface products with simple functions were commercialized .but now user demands are increasing and the system has more various applicable fields due to a high penetration rate of the Internet. Therefore, the demand for embedded system is tend to rise In this paper, we Implementation of an embedded system for image tracking. This system is used a fixed IP for the reliable server operation on TCP/IP networks. A real time broadcasting of video image on the internet was developed by using an USB camera on the embedded Linux system. The digital camera is connected at the USB host port of the embedded board. all input images from the video camera is continuously stored as a compressed JPEG file in a directory at the Linux web-server. And each frame image data from web camera is compared for measurement of displacement Vector. That used Block matching algorithm and edge detection algorithm for past speed. And the displacement vector is used at pan/tilt motor control through RS232 serial cable. The embedded board utilized the S3C2410 MPU Which used the ARM 920T core form Samsung. The operating system was ported to embedded Linux kernel and mounted of root file system. And the stored images are sent to the client PC through the web browser. It used the network function of Linux and it developed a program with protocol of the TCP/IP.

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Optimized Design Technique of The EMI(Electro Magnetic Interference) Noise Reduction for Wireless Video Stream System (무선 비디오 스트림 시스템 EMI 잡음 개선 방안)

  • Park, Kyoung-Jin;Kim, Jung-Min;Ra, Keuk-Hwan
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.11 no.4
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    • pp.112-120
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    • 2012
  • In this paper, we manufactured the wireless video stream system after we scanned EMI(Electro Magnetic Interference)noise in the system. and then, we analysed the noise frequency in the interface, circuit and PCB(Printed Circuit Board). we suggested EMI noise reduction technique. The applied reduction method is low pass filtering, the internal layer placement for high speed video data line and optimization of the system ground condition. the manufactured system improved about 2 ~ 20[dB] margin for EMI limit 40[dBuV/m] at 30 ~ 230[MHz] and 47[dBuV/m] at 230 ~ 1000[MHz].