• Title/Summary/Keyword: harmonic elimination

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AC harmonic elimination and reactive power compensation by voltage-type active filter (전압형 능동필터에 의한 교류고조파제거와 무효전력보상)

  • 김한성;최규하;신우석;이제필
    • 제어로봇시스템학회:학술대회논문집
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    • 1988.10a
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    • pp.688-692
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    • 1988
  • The active filter system for harmonic current compensation is presented in this paper. The active filter, composed of a three-phase voltage-type PWM inverter and the capacitor, compensates both the harmonic currents and the reactive power by injecting the PWM current to the ac line. This paper describes the principle of harmonic current compensation, the calculation circuits for the harmonic currents to be injected, the several compensation characteristics. Also the experimental results are shown to verify the theory proposed in this paper.

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Elimination of Low Order Harmonics in Multilevel Inverters Using Genetic Algorithm

  • Salehi, Reza;Farokhnia, Naeem;Abedi, Mehrdad;Fathi, Seyed Hamid
    • Journal of Power Electronics
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    • v.11 no.2
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    • pp.132-139
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    • 2011
  • The selective harmonic elimination pulse width modulation (SHEPWM) switching strategy has been applied to multilevel inverters to remove low harmonics. Naturally, the related equations do not have feasible solutions for some operating points associated with the modulation index (M). However, with these infeasible points, minimizing instead of eliminating harmonics is performed. Thus, harmful harmonics such as the $5^{th}$ harmonic still remains in the output waveform. Therefore, it is proposed in this paper to ignore solving the equation associated with the highest order harmonics. A reduction in the eliminated harmonics results in an increase in the degrees of freedom. As a result, the lower order harmonics are eliminated in more operating points. A 9-level inverter is chosen as a case study. The genetic algorithm (GA) for optimization purposes is used. Simulation results verify the proposed method.

Cascaded Multi-Level Inverter Based IPT Systems for High Power Applications

  • Li, Yong;Mai, Ruikun;Yang, Mingkai;He, Zhengyou
    • Journal of Power Electronics
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    • v.15 no.6
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    • pp.1508-1516
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    • 2015
  • A single phase H-bridge inverter is employed in conventional Inductive Power Transfer (IPT) systems as the primary side power supply. These systems may not be suitable for some high power applications, due to the constraints of the power electronic devices and the cost. A high-frequency cascaded multi-level inverter employed in IPT systems, which is suitable for high power applications, is presented in this paper. The Phase Shift Pulse Width Modulation (PS-PWM) method is proposed to realize power regulation and selective harmonic elimination. Explicit solutions against phase shift angle and pulse width are given according to the constraints of the selective harmonic elimination equation and the required voltage to avoid solving non-linear transcendental equations. The validity of the proposed control approach is verified by the experimental results obtained with a 2kW prototype system. This approach is expected to be useful for high power IPT applications, and the output power of each H-bridge unit is identical by the proposed approach.

Output Voltage Control in a Serise Multilevel H-bridge Inverter with SHE-PWM Method (직렬 멀티레벨 H-bridge inverter에서 SHE-PWM방식을 사용한 출력 전 압의 제어)

  • Kim J.Y.;Jeong S.G.
    • Proceedings of the KIPE Conference
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    • 2003.07a
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    • pp.1-4
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    • 2003
  • This paper proposes a method of voltage control for three-phase multilevel H-bridge inverters with selective harmonic elimination (SHE) PWM The full-bridge configuration of H-bridge inverter cells enables voltage control with a fixed PWM pattern by means of phase shifting between the legs, which greatly simplifies the control while maintaining the harmonic elimination characteristics. The series combination of the cells in multilevel configuration can be exploited to further improve the hormonic elimination characteristics with proper phase shifting between the ceil volitage. A complexor-based control method is introduced to control the magnitude and phase angle of cell voltages that form three-phase multilevel output voltages. Simulation results show that the proposed method along with SHE PWM would provide satisfactory performance in spite of its simplicity.

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An On-Line Harmonic Elimination Pulse Width Modulation Scheme for Voltage Source Inverter

  • Salam, Zainal
    • Journal of Power Electronics
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    • v.10 no.1
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    • pp.43-50
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    • 2010
  • This paper proposes a new harmonic elimination PWM (HEPWM) scheme for voltage source inverters (VSI) based on the curve fittings of certain polynomials functions. The resulting equations to calculate the switching angle of the HEPWM require only the addition and multiplication processes; therefore any number of harmonics to be eliminated and the fundamental amplitude of the pole switching waveform (NP1) can be controlled on-line. An extensive angle error analysis is carried out to determine the accuracy of the algorithm in comparison to the exact solution. To verify the workability of the technique, an experimental single phase VSI is constructed. The algorithm is implemented on a VSI using a 16-bit microprocessor. The results obtained from the test rig are compared to the theoretical prediction and the results of the MATLAB simulations.

Optimization of Harmonic Tuning Circuit vary as Drain Voltage of Class F Power Amplifier (Class F 전력 증폭기의 드레인 전압 변화에 따른 고조파 조정 회로의 최적화)

  • Lee, Chong-Min;Seo, Chul-Hun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.46 no.1
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    • pp.102-106
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    • 2009
  • This paper presents the design and optimization of output matching network according to envelope for class F power amplifier(PA) which is to apply to envelope elimination and restoration(EER) transmitter. In this paper, to increase the PAE of class F power amplifier which applies to EER transmitter, the varactor diode has been used on output matching network. As envelope changes, it optimizes constitution of harmonic trap that is short circuit in 2nd-harmonic and is open circuit in 3rd-harmonic. When drain voltage changes from 25 V to 30 V, some percentage is improved in the PAE.put the abstract of paper here.

Selective Harmonic Elimination for a Single-Phase 13-level TCHB Based Cascaded Multilevel Inverter Using FPGA

  • Halim, Wahidah Abd.;Rahim, Nasrudin Abd.;Azri, Maaspaliza
    • Journal of Power Electronics
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    • v.14 no.3
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    • pp.488-498
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    • 2014
  • This paper presents an implementation of selective harmonic elimination (SHE) modulation for a single-phase 13-level transistor-clamped H-bridge (TCHB) based cascaded multilevel inverter. To determine the optimum switching angle of the SHE equations, the Newton-Raphson method is used in solving the transcendental equation describing the fundamental and harmonic components. The proposed SHE scheme used the relationship between the angles and a sinusoidal reference waveform based on voltage-angle equal criteria. The proposed SHE scheme is evaluated through simulation and experimental results. The digital modulator based-SHE scheme using a field-programmable gate array (FPGA) is described and has been implemented on an Altera DE2 board. The proposed SHE is efficient in eliminating the $3^{rd}$, $5^{th}$, $7^{th}$, $9^{th}$ and $11^{th}$ order harmonics, which validates the analytical results. From the results, it can be seen that the adopted 13-level inverter produces a higher quality with a better harmonic profile and sinusoidal shape of the stepped output waveform.

Real time Implementation of SHE PWM in Single Phase Matrix Converter using Linearization Method

  • Karuvelam, P. Subha;Rajaram, M.
    • Journal of Electrical Engineering and Technology
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    • v.10 no.4
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    • pp.1682-1691
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    • 2015
  • In this paper, a real time implementation of selective harmonic elimination pulse width modulation (SHEPWM) using Real Coded Genetic Algorithm (RGA), Particle Swarm Optimization technique (PSO) and a new technique known as Linearization Method (LM) for Single Phase Matrix Converter (SPMC) is designed and discussed. In the proposed technique, the switching frequency is fixed and the optimum switching angles are obtained using simple mathematical calculations. A MATLAB simulation was carried out, and FFT analysis of the simulated output voltage waveform confirms the effectiveness of the proposed method. An experimental setup was also developed, and the switching angles and firing pulses are generated using Field Programmable Gate Array (FPGA) processor. The proposed method proves that it is much applicable in the industrial applications by virtue of its suitability in real time applications.

Variable Speed Drive of Permenant Split­Capacitor Single Phase Induction Motor Using SHE PWM Inverters (SHE PWM 인버터를 이용한 영구 콘덴서형 단상 유도전동기의 가변속 구동)

  • 이수원;전칠환
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.7 no.8
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    • pp.1751-1758
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    • 2003
  • This paper describes speed control of a permanent split capacitor single phase induction motor using SHE PWM inverters. The inverter is controlled by V55 microprocessor and its range is larger than other systems. Due to the V/F control with SHE(Selected Harmonic Elimination) PWM, continuously variable speed is attained and THD(Total Harmonic Distortion) is decreased. This is verified by simulations and experimental results.

Harmonic Elimination and Optimization of Stepped Voltage of Multilevel Inverter by Bacterial Foraging Algorithm

  • Salehi, Reza;Vahidi, Behrooz;Farokhnia, Naeem;Abedi, Mehrdad
    • Journal of Electrical Engineering and Technology
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    • v.5 no.4
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    • pp.545-551
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    • 2010
  • A new family of DC to AC converters, referred to as multilevel inverter, has received much attention from industries and researchers for its high power and voltage applications. One of the conventional techniques for implementing the switching algorithm in these inverters is optimized harmonic stepped waveform (OHSW). However, the major problem in using this technique is eliminating low order harmonics by solving the nonlinear and complex equations. In this paper, a new approach called the "bacterial foraging algorithm" (BFA) is employed. This algorithm eliminates and optimizes the harmonics in a multilevel inverter. This method has higher speed, precision, and convergence power compared with the genetic algorithm (GA), a famous evolutionary algorithm. The proposed technique can be expanded in any number of levels. The purpose of optimization is to remove some low order harmonics, as well as to ensure the fundamental harmonic retained at the desired value. As a case study, a 13-level inverter is chosen. The comparison results by MATLAB software between the two optimization methods (BFA and GA) have shown the effectiveness and superiority of BFA over GA where convergence is desired to achieve global optimum.