• 전력전자학회논문지
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• 제12권6호
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• pp.510-516
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• 2007

본 논문에서는 더 높은 에너지 효율을 요구하는 전자 기기들의 사용에 따른 고전력 밀도 AC/DC adapter를 위한 향상된 제어 방법을 제안한다. PFC (Power Factor Correction) 토폴로지는 BCM (Boundary Conduction Mode)제어 방식을 적용한 부스트 토폴로지를 기본으로 하였으며, DC/DC 토폴로지는 50% 고정 duty법과 함께 새롭게 제안된 Off-time 제어법을 적용한 하프브릿지 토폴로지를 기본으로 하였다. 이는 반도체 소자와 마그네틱 소자의 크기를 줄이는데 용이하다. 85W급 AC/DC 어뎁터(18.5V/4.6A)를 설계하여 실험한 결과 90%의 효율과 $36W/in^3$의 전력밀도가 측정되었고 무부하시 전력 손실은 0.5W를 달성하였다.

• Journal of Power Electronics
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• 제13권1호
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• pp.113-121
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• 2013

This paper introduces a simple core loss calculation method for output filter inductor in pulse width modulation (PWM) DC-AC inverter. Amorphous C-core (AMCC-320) is used to analyze the core loss. In order to measure core loss of the output filter inductor and validate the proposed method, a single-phase half-bridge inverter and a calorimeter are used. By changing switching frequency and modulation index (MI) of the inverter, core loss of the AMCC-320 is measured with the lab-made calorimeter and the results are compared with calculated core loss. The proposed method can be easily extended to other core loss calculation of various converters.

• 제어로봇시스템학회논문지
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• 제13권2호
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• pp.154-162
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• 2007

In this paper, we propose a new AC-DC converter control method to comply with harmonics regulation(IEC 61000-3) effective for the inverter system of an air conditioner whose power consumption is less than 2,500W. There are many different ways of AC-DC converter control, but this paper focuses on the converter control method that is adopting an input reactor with low cost silicon steel core to strengthen cost competitiveness of the manufacturer. The proposed control method controls input current every half cycle of the line frequency to get unit power factor and at the same time to reduce switching loss of devices and acoustic noise from reactor. This kind of converter is known as a Partial Switching Converter(PSC). In this study, theoretical analysis of the PSC has been performed using Matlab/Simulink while a 16-bit micro-processor based converter has been used to perform the experimental analysis. In the theoretical analysis, electrical circuit models and equations of the PSC are derived and simulated. In the experiments, micro-processor controls input current to keep the power factor above 0.95 by reducing the phase difference between input voltage and current and at the same time to maintain a reference DC-link voltage against voltage drop which depends on DC-link load. Therefore it becomes possible to comply with harmonic regulations while the power factor is maximized by optimizing the time of current flow through the input reactor for every half cycle of line frequency.

• 전력전자학회논문지
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• 제9권6호
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• pp.577-583
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• 2004

액정 디스플레이의 백라이트에 사용되는 냉음극 방전램프(CCFL: Cold Cathode Fluorescent Lamp) 구동을 위해 압전 변압기(Piezoelectric Transformer)를 사용하였으며, 최적 파라미터를 선정하여 실험을 통해 검증하였다. 적용한 압전 인버터로는 푸시-풀(Push-Pull)회로와 하프-브리지(Half-Bridge) 회로이며, 휘도 제어기법으로는 각각 아날로그(Analog) 방식과 버스트(Burst) 방식을 사용하였다. 푸시-풀 인버터의 경우 아날로그 제어방식으로 제어전압 2.5-4.5V에서 출력전류 1-6mA로 휘도 0-100% 특성을 보였다. 입출력 효율로 90.3%를 얻었으며, 하프브리지 인버터에 적용한 버스트 제어방식에서는 듀티비 5-50%에서 1-6mA의 제어 성능을 보였으며, 인버터의 입출력 효율은 82.1%를 얻었다.

• 한국정보통신학회논문지
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• 제5권7호
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• pp.1326-1331
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• 2001

본 논문에서는 데이터 전송용 특정 소출력 무선국용 무선기기의 송수신판의 회로를 설계하고 제작하여 특성을 측정 하였다. 주파수 대역은 424.7~424.95MHz이고, 반이중(Half Duplex Communication) 통신방식, PLL Synthesized, 20 채널1, 12.5kHz 채널 대역폭 그리고 FSK Modulation/Demodulation 방식을 사용하였다. 송신단은 저잡음 증폭기와 전력증폭기를 사용하여 10mW의 출력으로 설계하였고, 발생되는 스퓨리어스를 감쇄시키기 위해 저역통과필터와 공진 회로로 구성하였다. 수신단은 이중 변환방식을 사용하였다. 설계한 결과, 송신단의 출력은 9.71dBm, 스퓨리어스특성 47dBc 그리고 수신단은 감도가 -1130Bm에서 지터가 $\pm$12.3%로 나타났다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2017년도 전력전자학술대회
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• pp.38-39
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• 2017

This paper proposes a new control method for an AC-DC Buck converter which is utilized as a front-end converter of a 2-stage high power density adapter. In the conventional adapter applications, 2-stage configuration shows higher power transfer efficiency and higher power density than those of the single stage flyback converter. In the 2-stage AC-DC converter, the boost converter is widely used as a front-end converter. However, an efficiency variation between high AC line and low AC line is large. On the other hand, the proposed conduction band control method for a buck front-end converter has an advantage of small efficiency variation. In the proposed control method, switching operation is determined by a band control voltage which represents output load condition, and an AC line voltage. If the output load increasesin low AC line, the switching operation range is expanded in half of line cycle. On the contrary, in light load and high line condition, the switching operation is narrowed. Thus, the proposed control method reduces switching loss under high AC line and light load condition. A 60W prototype which is configured the buck and LLC converter with the proposed control method is experimented on to verify the validity of the proposed system. The prototype shows 92.16% of AC-DC overall efficiency and 20.19 W/in 3 of power density.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제49권8호
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• pp.529-535
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• 2000

In this paper, a current control system of a single phase PWM AC/DC converter using a reduced-order Luenberger observer without source voltage sensors is proposed. The sinusoidal input current and unity input power factor are realised based on the estimated source voltage performed by the reduced-order Luenberger observer using actual currents and DC link voltage. The poles of the reduced-order Luenberger observer are placed in the left half plane of s-plane by the pole-placement method in order to acquire the stability of the observer. The magnitude and the phase of the estimated source voltage are used to accomplish the unity power factor. The proposed method is implemented by DSP(Digital Signal Processor). Experimental Results verify that the reduced-order observer estimates the source voltage without the estimation error and the control system accomplishes the unity power factor, and constant DC link voltage.

• 조명전기설비학회논문지
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• 제12권3호
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• pp.37-44
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• 1998

본 논문에서는 분산전원 장치에 사용되는 증첩형 액티브클램프 ZVS 포워드 컨버터와 ZVS 하프 브리지(Half bbridge) 컨버터의 동작특성과 효율을 비교하였다. 또한 중첩형 액티브클램프 ZVS 포워드 컨버터의 전류모드 제어회로 설계 방법을 제시하였고, 게이트 구동회로를 간단히 하기 위해 N-P M OSFETs 로 조합된 액티브클램프 기법을 제안하여 50~100% 부하 범위에서 약 90%의 효율을 얻을 수 있었다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2002년도 전력전자학술대회 논문집
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• pp.538-541
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• 2002

Dynamic analysis and compensation design for an asymmetrical half bridge do-dc converter are presented. A small-signal model is developed using the averaging method. Based on the proposed small-signal average model, the open loop transfer functions of the power stage were obtained and used for the compensation design. All theoretical predictions are validated by experiments on a prototype converter.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2008년도 추계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.223-225
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• 2008

In order to apply SFCLs into electric power systems, the urgent issues to be settled are as follows, such as initial installation price, operation and maintenance cost due to ac loss of superconductor and the life of cryostat, and high voltage and high current problems. We designed novel hybrid SFCLs which combine superconductor and conventional electric equipments including a vacuum interrupter, an electro-magnetic contactor and a current limiting reactor. The main purpose of the hybrid SFCL is to drastically reduce total usage of superconductor by adopting current commutation method by use of the superconductor and the fast switch. According to protective coordination and performance, we investigated two concepts of Hybrid SFCLs. First is a half cycle fault current limitation type and second is a non-half cycle fault current limitation type. We concluded that the non-half cycle fault current limitation type is batter than the other.