• Journal of the Institute of Electronics Engineers of Korea SC
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• v.39 no.6
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• pp.71-78
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• 2002

A method of soft switching in the half bridge converter using a small saturable core is presented. For the soft switching, a small dead time of both switch off is made in a pair of MOSFET switch. The saturable core is of rectangular magnetization characteristics and the core flux swings from the minus to the plus saturation during ON time of the switch. The soft switching is realized in dead time by a resonance between the saturating inductance of the core and the stray capacitance of MOSFET. As an extension of this concept, instead of the saturable core, we propose a new soft switching circuit using a linear inductance and two switches, which is especially suitable for regulating the output and also for high frequency switching. A theoretical principle of soft switching presented here was confirmed by experiments on a half bridge converter of 1.25 KW.

• Journal of Power Electronics
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• v.15 no.6
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• pp.1429-1437
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• 2015

A new parallel hybrid soft switching converter with low circulating current losses during the freewheeling state and a low output current ripple is presented in this paper. Two circuit modules are connected in parallel using the interleaved pulse-width modulation scheme to provide more power to the output load and to reduce the output current ripple. Each circuit module includes a three-level converter and a half-bridge converter sharing the same lagging-leg switches. A resonant capacitor is adopted on the primary side of the three-level converter to reduce the circulating current to zero in the freewheeling state. Thus, the high circulating current loss in conventional three-level converters is alleviated. A half-bridge converter is adopted to extend the ZVS range. Therefore, the lagging-leg switches can be turned on under zero voltage switching from light load to full load conditions. The secondary windings of the two converters are connected in series so that the rectified voltage is positive instead of zero during the freewheeling interval. Hence, the output inductance of the three-level converter can be reduced. The circuit configuration, operation principles and circuit characteristics are presented in detail. Experiments based on a 1920W prototype are provided to verify the effectiveness of the proposed converter.

• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.1183-1184
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• 2011

In case of the power conversion converter for driving the Lighting control system, the input voltage widens from $90V_{rms}$ to $264V_{rms}$. Among various methods, LLC half-bridge converter has wide input regulation range and limited switching frequency control range and ZVS is possible for even non-loaded case. Also, the converter can be applied for Universal Lighting control system. In this paper, the transformer design is studied. The efficiency measured is up to 90%.

• Journal of Power Electronics
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• v.7 no.4
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• pp.328-335
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• 2007

A conventional Single-Stage Power-Factor-Correction (PFC) AC/DC converter has a link capacitor voltage problem under high line input and low load conditions. In this paper, this problem is analyzed by using the voltage conversion ratio of the DC/DC conversion cell. By applying this analysis, a new Single-Stage PFC AC/DC converter with a boost PFC cell integrated with a Voltage-Doubler Rectified Asymmetrical Half-Bridge (VDRAHB) is proposed. The proposed converter features good power factor correction, low current harmonic distortions, tight output regulations and low voltage of the link capacitor. An 85W prototype was implemented to show that it meets harmonic requirements and standards satisfactorily with near unity power factor and high efficiency over universal input.

• Proceedings of the KIPE Conference
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• 2002.07a
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• pp.480-484
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• 2002

A new active lossless snubber for half-bridge dual converter(that is called 'dual converter') is proposed in this paper. It features soft switching(ZVS) as well as turn-off snubbing in both main and auxiliary switches. As it uses parasitic components, such as leakage inductances and switch output capacitances etc, it helps the dual converter to operate at the higher frequency with a higher efficiency and smaller size reactive components. The operational principle, theoretical analysis, and design consideration are presented. To confirm the operation, features and validity of the proposed circuit, simulated results from an 1kW, 24V/DC-250V/DC are presented.

• Journal of Electrical Engineering and Technology
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• v.9 no.5
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• pp.1632-1642
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• 2014

This paper presents an interleaved resonant converter to reduce the voltage stress of power MOSFETs and achieve high circuit efficiency. Two half-bridge converters are connected in series at high voltage side to limit MOSFETs at $V_{in}/2$ voltage stress. Flying capacitor is used between two series half-bridge converters to balance two input capacitor voltages in each switching cycle. Variable switching frequency scheme is used to control the output voltage. The resonant circuit is operated at the inductive load. Thus, the input current of the resonant circuit is lagging to the fundamental input voltage. Power MOSFETs can be turn on under zero voltage switching. Two resonant circuits are connected in parallel to reduce the current stress of transformer windings and rectifier diodes at low voltage side. Interleaved pulse-width modulation is adopted to decrease the output ripple current. Finally, experiments are presented to demonstrate the performance of the proposed converter.

• The Transactions of the Korean Institute of Power Electronics
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• v.27 no.4
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• pp.356-366
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• 2022

This paper presents a mode transition method that applies frequency compensation technique of an LLC resonant converter for stable mode transition. LLC resonant converters used in various applications require high efficiency and high power density. However, because of circuit property, a wider voltage gain range equates to a greater circuit loss, so maintaining high efficiency at all voltage gain ranges is difficult. In this case, full bridge-half bridge mode transition method can be used, which maintains high efficiency even in a wide voltage gain range. However, this method causes damage to the circuit through overcurrent by the mode transition. This study analyzes the cause of the problem and proposes a mode transition method that applies frequency compensation technique to solve the problem. The proposed method verifies the stable transition through simulation analysis and experimental results.

• Journal of Power Electronics
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• v.5 no.1
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• pp.67-75
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• 2005

A high efficiency ZVS PWM asymmetrical half bridge converter for a plasma display panel (PDP) sustaining power modules is proposed in this paper. To achieve the ZVS of power switches for the wide load range, a small additional inductor L/sub 1kg/, which also acts as an output filter inductor, is serially inserted into the transformer's primary side. At that point, to solve the problem of ringing in the secondary rectifier caused by L/sub 1kg/, the proposed circuit employs a structure without the output filter inductor, which helps the voltages across rectifier diodes to be clamped at the output voltage. Therefore, no dissipative RC (resistor capacitor) snubber for rectifier diodes is needed and a high efficiency as well as low noise output voltage can be realized. In addition, since it has no large output inductor filter, the asymmetrical half bridge converter features a simpler structure, lower cost, less mass, and lighter weight. In addition, since all energy stored in L/sub 1kg/ is transferred to the output side, the circulating energy problem can be effectively solved. The operational principle, theoretical analysis, and design considerations are presented. To confirm the operation, validity, and features of the proposed circuit, experimental results from a 425W, 385Vdc/170Vdc prototype are presented.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.8
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• pp.719-726
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• 2008

In this paper, we designed driving IC for 500 V resonant half-bridge type power converter, In this single-ended level shifter, chip area and power dissipation was decreased by 50% and 23.5% each compared to the conventional dual-ended level shifter. Also, this newly designed circuit solved the biggest problem of conventional flip-flop type level shifter in which the power MOSFET were turned on simultaneously due to the large dv/dt noise. The proposed high side level shifter included switching noise protection circuit and schmmit trigger to minimize the effect of displacement current flowing through LDMOS of level shifter when power MOSFET is operating. The designing process was proved reasonable by conducting Spectre and PSpice simulation on this circuit using 1${\mu}m$ BCD process parameter.

• Journal of Electrical Engineering and Technology
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• v.13 no.1
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• pp.143-151
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• 2018

In this paper, a novel hybrid configuration combining a phase-shift full-bridge (PSFB) and a half-bridge resonant LLC converter is proposed for the On-Board Charger of Electric Vehicles (EVs). In the proposed converter, the PSFB converter shares the lagging-leg switches with half-bridge resonant converter to achieve the wide ZVS range for the switches and to improve the efficiency. The output voltage is modulated by the effective-duty-cycle of the PSFB converter. The proposed converter employs an active reset circuit composed of an active switch and a diode for the transformer which makes it possible to achieve zero circulating current and the soft switching characteristic of the primary switches and rectifier diodes regardless of the load, thereby making the converter highly efficient and eliminating the reverse recovery problem of the diodes. In addition an optimal power sharing strategy is proposed to meet the specification of the charger and to optimize the efficiency of the converter. The operation principle the proposed converter and design considerations for high efficiency are presented. A 6.6 kW prototype converter is fabricated and tested to evaluate its performance at different conditions. The peak efficiency achieved with the proposed converter is 97.7%.