• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.10
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• pp.801-807
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• 2009

In this paper, we propose a novel shoot-through protection circuit and pulse generator for half-bridge driver IC. We designed a robust half-bridge driver IC over a variation of processes and power supplies. The proposed circuit is composed a delay circuit using a beta-multiplier reference. The proposed circuit has a lower variation rate of dead time and pulse-width over variation of processes and supply voltages than the conventional circuit. Especially, the proposed circuit has more excellent pulse-width matching of set and reset signals than the conventional circuit. Also, the proposed pulse generator is prevented from fault operations using a logic gate. Dead time and pulse-width of the proposed circuit are typical 250 ns, respectively. The variation ratio is 68%(170 ns) of maximum over variation of processes and supply voltages. The proposed circuit is designed using $1\;{\mu}m$ 650 V BCD (Bipolar, CMOS, DMOS) process parameter, and the simulations are carried out using Spectre simulator of Cadence corporation.

• Proceedings of the KIPE Conference
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• 2019.07a
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• pp.139-141
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• 2019

Capacitive power transfer has an advantage in the simplicity of the energy link structure. So, the conventional phase -shift full bridge sometime is not always the best choice because of its complexity and high cost. On the other hand, the link capacitance is usually very low and requires high-frequency operation, but, the series resonant converter loses zero-voltage switching feature in the light load condition, which makes the switching loss high especially in CPT system. The paper proposes a new low-cost topology based on asymmetric half-bridge to achieve simplicity as well as wide zero voltage switching range. The design procedure is presented, and circuit operations are analyzed and verified by simulation.

• Journal of Power Electronics
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• v.17 no.1
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• pp.96-105
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• 2017

In this paper, a hybrid modular multilevel converter (MMC) topology with an improved nearest level modulation method is proposed for medium-voltage high-power applications. The arm of the proposed topology contains N series connected half-bridge submodules (HBSMs), one full-bridge submodule (FBSM) and an inductor. By exploiting the FBSM, half-level voltages are obtained in the arm voltages. Therefore, an output voltage with a 2N+1 level number can be generated. Moreover, the total level number of the inserted submodules (SMs) is a constant. Thus, there is no pulse voltage across the arm inductors, and the SM capacitor voltage is rated. With the proposed voltage balancing method, the capacitor voltage of the HBSM is twice the voltage of the FBSM, and each IGBT of the FBSM has a relatively low switching frequency and an equalized conduction loss. The capacitor voltage balancing methods of the two kinds of SMs are implemented independently. As a result, the switching frequency of the HBSM is not increased compared to the conventional MMC. In addition, according to a theoretical calculation of the total harmonic distortion of the electromotive force (EMF), the voltage quality with the presented method can be significantly enhanced when the SM number is relatively small. Simulation and experimental results obtained with a MMC-based inverter verify the validity of the developed method.

• Proceedings of the KIPE Conference
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• 2019.07a
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• pp.317-319
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• 2019

In this paper, a three level duty cycle controlled half bridge LLC converter for EV charger application is presented. The topology and operating regions of the converter are discussed. The equations of the converter are derived in time domain. A small signal model of the converter is developed by perturbation and linearization of the steady state model about their operating point using Extended Describing function.

• Journal of IKEEE
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• v.23 no.2
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• pp.636-641
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• 2019

A simple resistance deviation-to-time period converter is proposed for interfacing resistive half-bridge sensors. It consists of two 2nd generation current conveyors(CCIIs). The proposed converter has simpler circuit configuration than the conventional converters using operational amplifiers or operational transconductance amplifiers(OTAs). The proposed converter was simulated using CCII implemented with AD844 IC chips. The simulation results show that the converter has a conversion sensitivity of $0.01934ms/{\Omega}$ over a range of $100-500{\Omega}$ resistance deviations and a linearity error less than ${\pm}0.002%$.

• Proceedings of the KIPE Conference
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• 2008.06a
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• pp.493-495
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• 2008

A new three-level resonant converter suitable for wide input variation is proposed. A hybrid combination of a three-level converter controlled by phase-shift modulation and a half-bridge converter is presented. Since the voltage of each switch is one half of the input voltage, it has advantages of the choice and characteristics of switches. The ZVS operation of the converter is achieved by using the magnetizing current of the transformer. To verify the theoretical analysis, experimental results of the proposed converter are presented.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.53 no.10
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• pp.610-617
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• 2004

This paper presents a novel high frequency generating circuit integrated chopper-inverter using ZVS with high power-factor. The proposed topology is integrated half-bridge boost rectifier as power factor corrector(PFC) and half-bridge high frequency resonant inverter into a single-stage. The input stage of the half-bridge boost rectifier works in discontinuous conduction mode(DCM) with constant duty cycle and variable switching frequency. So that a boost converter makes the line current follow naturally the sinusoidal line voltage waveform. Simulation results have demonstrated the feasibility of the proposed high frequency resonant inverter. Characteristics values based on characteristics analysis through circuit analysis is given as basis data in design procedure. Also, experimental results are presented to verify theoretical discussion. This proposed inverter will be able to be practically used as a power supply in various fields as induction heating applications. fluorescent lamp and DC-DC converter etc.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2006.05a
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• pp.399-402
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• 2006

This paper presents a new circuit topology of dc bus line switch-assisted half-bridge soft switching PWM inverter type dc-dc converter for arc welder. The proposed power converter is composed of typical voltage source half-bridge high frequency PWM inverter with a high frequency transformer link in addition to dc bus line side power semiconductor switching devices fer PWM control scheme and capacitive lossless snubbers. All the active power switches in the half-bridge arm and dc bus lines can achieve ZCS turn-on and ZVS turn-off commutation operation and consequently the total turn-off switching losses can be significantly reduced. As a result, a high switching frequency of using IGBTs can be actually selected more than about 20 kHz. The effectiveness of this new converter topology is proved for low voltage and large current dc-dc power supplies such as arc welder from a practical point of view.

• Journal of IKEEE
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• v.22 no.4
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• pp.985-991
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• 2018

In this paper, an equivalent circuit reflecting the internal loss of the LLC resonant half bridge converter was proposed and a steady state characteristic equation including the loss factors was derived. Using the results, the frequency characteristics of I/O voltage gain and input impedance were compared with the lossless model In order to verify the proposed model and the derived equation, the main components of the 1kW class LLC resonant half bridge converter were selected under the same conditions and the steady state characteristics such as voltage gain and input impedance were compared. In particular, to compare more closely the steady state error of the two models, we observed the change in switching frequency with respect to the load current, which is considered to be the most important in the actual circuit design stage. As a result, it is confirmed that the error of the operating frequency is significantly improved from the proposed model and the analysis result.

• Proceedings of the KIPE Conference
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• 2007.07a
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• pp.431-434
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• 2007