• Journal of Korea Multimedia Society
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• v.16 no.11
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• pp.1348-1356
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• 2013

Disney Animation has showed not only artistic excellence but also technological innovations through a lot of animation films that they released. Especially with the unique concept that free-willed game characters dive into different worlds of games in animation film, received both critical and commercial acclaim for its stunning visuals and outstanding CG (computer graphics) effects. The purpose of this study is to analyze different styles of game worlds, Disney's layout pipeline, and in-house camera capture system used in . This paper analyzes that three game worlds in this film such as Fix-It Felix Jr., Sugar Rush, and Hero's Duty express different styles by using appropriate character animation and camera movements. Especially Hero's Duty game which new in-house camera capture system is extensively used maximizes unseen visuals by perfectly making realistic and believable game world. Disney's newly developed in-house camera capture system, which is used in this film for the first time, allows real camera's motion and shake and real-time camera's movement and correction within animation set. Result of this study proves that this system improves directing of feature animation and enhance efficiency of the layout department's production process. Therefore, it contributes to a great extent to development of animation films' business.

• Journal of IKEEE
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• v.12 no.4
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• pp.246-254
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• 2008

This paper represents a design of a 4 way SIMD processor with multi-thread and dual phase instruction pipeline. 8 threads can be performing in round-robin order, so any hazards can’t occur. The dual phase pipeline makes a pipeline operate as two pipelines, and it can fetch maximum 4 unit instructions at once. This variable length instruction set divide into first phase and second phase instructions, and with this function, complex branch and addressing can be executed at one clock cycle. This processor reduces the code size to quarter, pull out the doubled performance improvement than normal SIMD architecture.

• Journal of Korea Game Society
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• v.6 no.4
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• pp.55-61
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• 2006

Graphics rendering pipeline (application, geometry, and rasterizer) is the core of real-time graphics which is the most important functionality for computer games. Usually this rendering process is completed by both the CPU and the GPU, and a bottleneck can be located either in the CPU or the GPU. This paper focuses on reducing the bottleneck between the CPU and the GPU. We are proposing a method for improving the performance of parallel processing for real-time graphics rendering by separating the CPU operations (usually performed using a thread) into two parts: pure CPU operations and operations related to the GPU, and let them operate in parallel. This allows for maximizing the parallelism in processing the communication between the CPU and the GPU. Some experiments lead us to confirm that our method proposed in this paper can allow for faster graphics rendering. In addition to our method of using a dedicated thread for GPU related operations, we are also proposing an algorithm for balancing the graphics pipeline using the idle time due to the bottleneck. We have implemented the two methods proposed in this paper in our networked 3D game engine and verified that our methods are effective in real systems.

• Journal of the Korea Computer Graphics Society
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• v.26 no.3
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• pp.21-29
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• 2020

This study defines the pipeline for digital fashion contents production using CLO 3D, a 3D fashion design software that supports virtual clothing visualization as a cutting-edge simulation technology for fashion, and vuforia, a mobile platform augmented reality (AR) development kit for creating AR applications. The proposed production pipeline is organized in a method to produce a virtual clothing model through CLO 3D software through works of patterns, sewing lines, textures, etc., and AR contents based on computer vision techniques using the functions and properties of vuforia development kits in the Unity engine development environment. In addition, we present application method that can be practically utilized from the perspective of practical users, such as fashion designers and directors, by creating a new type of AR digital fashion contents directly as a flow of the defined production pipeline.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.05a
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• pp.140-142
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• 2011

In this paper, special purpose arithmetic unit for mobile graphics accelerator is designed. The designed processor supports six operations, such as $1/{\chi}$, $\frac{1}{{\sqrt{x}}$, $log_2x$, $2^x$, $sin(x)$, $cos(x)$. The processor adopts 2nd-order polynomial minimax approximation scheme based on IEEE floating point data format to satisfy accuracy conditions and has 5-stage pipeline structure to meet high operational rates. The SFAU processor consists of 23,000 gates and its estimated operating frequency is about 400 Mhz at operating condition of 65nm CMOS technology. Because the processor can execute all operations with 5-stage pipeline scheme, it has about 400 MOPS(million operations per second) execution rate. Thus, it can be applicable to the 3D mobile graphics processors.

• Journal of Korea Multimedia Society
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• v.11 no.8
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• pp.1160-1168
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• 2008

Recent technological innovations of mobile hardware which make it possible to implement real-time 3D rendering effects under mobile environment have provided a potential to develop realistic mobile application programs. This paper presents platform independent, OpenGL ES based, real-time mobile rendering libraries, called DMGL for supporting high quality 3D rendering on handhold devices. The libraries allows the programmers who develops mobile graphics softwares to generate varying advanced real-time 3D graphics effects without great effort. Moreover, GPGPU-based libraries give a set of functions to solve complex equations for simulating natural phenomena such as smoke and fire, and to render the results in real-time.

• Proceedings of the Korean Information Science Society Conference
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• 2006.06a
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• pp.226-228
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• 2006

In this paper we describe a simulation and development framework for designing mobile 3D graphics architectures. We are developing a simple and flexible simulation and verification environment (SVE) that uses gITrace's ability to intercept and redirect an OpenGL/ES streams. In combination wlth gITrace to trace OpenGL/ES commands, the SVE simulates the behavior of mobile 3D graphics pipeline during playback of traces, and then produces the second geometry trace that can be used as a test vector for the Verilog/HDL RT-level model. By comparing the frame-by-frame results, we can conduct architectural verification. To demonstrate the functionality of the SVE, we show the implementation of the verified mobile 3D architecture on a FPGA board. For this, we also present an application development environment (ADE) includes a mobile graphics API and a device driver interface (DDI). The proposed two software environments, the SVE and the ADE could be used fer developing and testing mobile applications, architectural study and speculative hardware designs.

• The Journal of Information Technology
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• v.10 no.3
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• pp.33-45
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• 2007

Systolic Array Processor is used for designing the special purpose processor in Digital Signal Processing, Computer Graphics, Neural Network Applications etc., since it has the characteristic of parallelism, pipeline processing and architecture of regularity. But, in case of using general design method, it has intial waiting period as large as No. of PE-1. And if the connected system needs parallel and simultaneous outputs, processor has some problems of the performance, since it generates only one output at each clock in output state. So in this paper, one dimensional Systolic Array Processor that is designed according to the dependance of data and operations using the partitioned sub-matrix is proposed for the purpose of improving the performance. 1-D Systolic Array using 4 partitioned sub-matrix has efficient method in case of considering those two problems.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.67 no.2
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• pp.270-276
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• 2018

Apache Spark is one of the high performance in-memory computing frameworks for big-data processing. Recently, to improve the performance, general-purpose computing on graphics processing unit(GPGPU) is adapted to Apache Spark framework. Previous Spark-GPGPU frameworks focus on overcoming the difficulty of an implementation resulting from the difference between the computation environment of GPGPU and Spark framework. In this paper, we propose a Spark framework based on a heterogenous pipeline computing with OpenCL to further improve the performance. The proposed framework overlaps the Java-to-Native memory copies of CPU with CPU-GPU communications(DMA) and GPU kernel computations to hide the CPU idle time. Also, CPU-GPU communication buffers are implemented with switching dual buffers, which reduce the mapped memory region resulting in decreasing memory mapping overhead. Experimental results showed that the proposed Spark framework based on a heterogenous pipeline computing with OpenCL had up to 2.13 times faster than the previous Spark framework using OpenCL.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.541-542
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• 2008

We propose an architecture for a lighting engine for mobile 3D graphics. The proposed architecture has a variable pipeline depending on lighting effects and the number of lighting sources so that unnecessary operations and power consumption are minimized. We design a lighting engine basedon the proposed architecture using Verilog-HDL and synthesized it using a 0.25um CMOS standard cell library at 100MHz. The synthesis results show that it occupies 180,000 and 260,000 gates for 24bit and 32bit formats, respectively.