• Title/Summary/Keyword: gigabit

Search Result 183, Processing Time 0.029 seconds

An Optimization Tool for Determining Processor Affinity of Networking Processes (통신 프로세스의 프로세서 친화도 결정을 위한 최적화 도구)

  • Cho, Joong-Yeon;Jin, Hyun-Wook
    • KIPS Transactions on Software and Data Engineering
    • /
    • v.2 no.2
    • /
    • pp.131-136
    • /
    • 2013
  • Multi-core processors can improve parallelism of application processes and thus can enhance the system throughput. Researchers have recently revealed that the processor affinity is an important factor to determine network I/O performance due to architectural characteristics of multi-core processors; thus, many researchers are trying to suggest a scheme to decide an optimal processor affinity. Existing schemes to dynamically decide the processor affinity are able to transparently adapt for system changes, such as modifications of application and upgrades of hardware, but these have limited access to characteristics of application behavior and run-time information that can be collected heuristically. Thus, these can provide only sub-optimal processor affinity. In this paper, we define meaningful system variables for determining optimal processor affinity and suggest a tool to gather such information. We show that the implemented tool can overcome limitations of existing schemes and can improve network bandwidth.

The Proposal Method of ARINC-429 Linkage for Efficient Operation of Tactical Stations in P-3C Maritime Patrol Aircraft (P-3C 해상초계기용 전술컴퓨터의 효율적 운영을 위한 ARINC-429 연동 방법)

  • Byoung-Kug Kim;Yong-Hoon Cha
    • Journal of Advanced Navigation Technology
    • /
    • v.27 no.2
    • /
    • pp.167-172
    • /
    • 2023
  • The P-3C maritime patrol aircraft operated by the Republic of Korea Navy is equipped with various sensor devices (LRUs, line replace units) for tactical data collection. Depending on the characteristics of the sensor device, it operates with various communication protocols such as IEEE 802.3, MIL-STD-1553A/B, and ARINC-429. In addition, the collected tactical data is processed in the tactical station for mission operators, and this tactical station constitutes a clustering network on Gigabit Ethernet and operates in a distributed processing method. For communication with the sensor device, a specific tactical station mounts a peripheral device (eg. ARINC-429 interface card). The problem is that the performance of the entire distributed processing according to the peripheral device control and communication relay of this specific device is degraded, and even the operation stop of the tactical station has a problem of disconnecting the communication with the related sensor device. In this paper, we propose a method to mount a separate gateway to solve this problem, and the validity of the proposed application is demonstrated through the operation result of this gateway.

An efficient interconnection network topology in dual-link CC-NUMA systems (이중 연결 구조 CC-NUMA 시스템의 효율적인 상호 연결망 구성 기법)

  • Suh, Hyo-Joong
    • The KIPS Transactions:PartA
    • /
    • v.11A no.1
    • /
    • pp.49-56
    • /
    • 2004
  • The performance of the multiprocessor systems is limited by the several factors. The system performance is affected by the processor speed, memory delay, and interconnection network bandwidth/latency. By the evolution of semiconductor technology, off the shelf microprocessor speed breaks beyond GHz, and the processors can be scalable up to multiprocessor system by connecting through the interconnection networks. In this situation, the system performances are bound by the latencies and the bandwidth of the interconnection networks. SCI, Myrinet, and Gigabit Ethernet are widely adopted as a high-speed interconnection network links for the high performance cluster systems. Performance improvement of the interconnection network can be achieved by the bandwidth extension and the latency minimization. Speed up of the operation clock speed is a simple way to accomplish the bandwidth and latency betterment, while its physical distance makes the difficulties to attain the high frequency clock. Hence the system performance and scalability suffered from the interconnection network limitation. Duplicating the link of the interconnection network is one of the solutions to resolve the bottleneck of the scalable systems. Dual-ring SCI link structure is an example of the interconnection network improvement. In this paper, I propose a network topology and a transaction path algorism, which optimize the latency and the efficiency under the duplicated links. By the simulation results, the proposed structure shows 1.05 to 1.11 times better latency, and exhibits 1.42 to 2.1 times faster execution compared to the dual ring systems.

Implant Isolation Characteristics for 1.25 Gbps Monolithic Integrated Bi-Directional Optoelectronic SoC (1.25 Gbps 단일집적 양방향 광전 SoC를 위한 임플란트 절연 특성 분석)

  • Kim, Sung-Il;Kang, Kwang-Yong;Lee, Hai-Young
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.44 no.8
    • /
    • pp.52-59
    • /
    • 2007
  • In this paper, we analyzed and measured implant isolation characteristics for a 1.25 Gbps monolithic integrated hi-directional (M-BiDi) optoelectronic system-on-a-chip, which is a key component to constitute gigabit passive optical networks (PONs) for a fiber-to-the-home (FTTH). Also, we derived an equivalent circuit of the implant structure under various DC bias conditions. The 1.25 Gbps M-BiDi transmit-receive SoC consists of a laser diode with a monitor photodiode as a transmitter and a digital photodiode as a digital data receiver on the same InP wafer According to IEEE 802.3ah and ITU-T G.983.3 standards, a receiver sensitivity of the digital receiver has to satisfy under -24 dBm @ BER=10-12. Therefore, the electrical crosstalk levels have to maintain less than -86 dB from DC to 3 GHz. From analysed and measured results of the implant structure, the M-BiDi SoC with the implant area of 20 mm width and more than 200 mm distance between the laser diode and monitor photodiode, and between the monitor photodiode and digital photodiode, satisfies the electrical crosstalk level. These implant characteristics can be used for the design and fabrication of an optoelectronic SoC design, and expended to a mixed-mode SoC field.

IPTV Service Provider over FTTH (광가입자망을 통한 IPTV 서비스 제공)

  • Park In-Gyu
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.43 no.5 s.347
    • /
    • pp.7-16
    • /
    • 2006
  • IPTV is referred to the service which provide integrated IPTV services for providing video, 10/100-Mbit/sec Internet, voice, video-on-demand (VOD), and other broadband applications including home security, video conferencing, and telemedicine. All services are integrated into an IP (Internet Protocol) architecture designed specifically for Gigabit Ethernet FTTH systems, HFC or xDLC. It is absolutely necessary that telecon operators provide IP video delivery platforms that enable service providers to transform their business. With their own products, they can better manage their existing services and generate new revenues from broadcast TV, movies on demand and multimedia. Triple-play is a combination of broadcast, telephony and broadband services offered through IPTV networks. With cable operators allowed to offer a triple-play bundle, the nation's telecom operators are beginning to get a little anxious. Cable operators assert that triple-play is a must-have and natural extension of the cable service bundle. The Korean Cable TV Association asserts that the triple-play model is of paramount importance to the cable industry's future growth. But the telecom sector considers itself unfairly disadvantaged, saying they cannot compete until regulatory issues are resolved. The start of web-based television in Korea may still be some time off with a confrontation between the nation's IT regulator and broadcasting sector over the service's legal boundaries shows no signs of being resolved my time soon. korea should be is the fastest-growing provider of IPTV solutions in the industry, with over worldwide customers.

Utilizing Channel Bonding-based M-n and Interval Cache on a Distributed VOD Server (효율적인 분산 VOD 서버를 위한 Channel Bonding 기반 M-VIA 및 인터벌 캐쉬의 활용)

  • Chung, Sang-Hwa;Oh, Soo-Cheol;Yoon, Won-Ju;kim, Hyun-Pil;Choi, Young-In
    • The KIPS Transactions:PartA
    • /
    • v.12A no.7 s.97
    • /
    • pp.627-636
    • /
    • 2005
  • This paper presents a PC cluster-based distributed video on demand (VOD) server that minimizes the load of the interconnection network by adopting channel bonding-based MVIA and the interval cache algorithm Video data is distributed to the disks of each server node of the distributed VOD server and each server node receives the data through the interconnection network and sends it to clients. The load of the interconnection network increases because of the large volume of video data transferred. We adopt two techniques to reduce the load of the interconnection network. First, an Msupporting channel bonding technique is adopted for the interconnection network. n which is a user-level communication protocol that reduces the overhead of the TCP/IP protocol in cluster systems, minimizes the time spent in communicating. We increase the bandwidth of the interconnection network using the channel bonding technique with MThe channel bonding technique expands the bandwidth by sending data concurrently through multiple network cards. Second, the interval cache reduces traffic on the interconnection network by caching the video data transferred from the remote disks in main memory Experiments using the distributed VOD server of this paper showed a maximum performance improvement of $30\%$ compared with a distributed VOD server without channel bonding-based MVIA and the interval cache, when used with a four-node PC cluster.

Algebraic Formal Specification and Formal Validation of the Standard and an Implementation of the OSPF Protocol (OSPF Protocol 표준 및 구현의 대수 정형적 명세 및 정형적 검증)

  • 박재현
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.29 no.3B
    • /
    • pp.360-374
    • /
    • 2004
  • The OSPF protocol is the most widely used Interior Gateway Routing Protocol. Therefore, for the reliability of behavior of gigabit swiching routers, it is essential to guarantee the interoperability and the safety of the OSPF protocol. In this paper, we analyze the standard document of the OSPF protocol, so that we provide a formal specification that specifies the protocol behaviors by detailed design level using the algebraic formal method. By referring available source codes of the OSPF protocol, we supplement the formal specification to express more detailed behaviors that is not specified definitely in the standard. We also formally verify the interoperability and the safety of the protocol state machine of the specification. By showing that the formal specification specify all of the states and the transition events that appear in the standard document of the OSPF protocol, we prove that the state machine has the completeness, and prove it has the interoperability. To prove that the specification of the protocol has the safety, we formally verify the reachability, the liveness, the livelock-free property, and the deadlock-free property. As a result, we prove the protocol has the consistency. The specification and the validation are also effective to the OSPF Version 3 that inherit the protocol mechanism of the OSPF Version 2.

A 5.4Gb/s Clock and Data Recovery Circuit for Graphic DRAM Interface (그래픽 DRAM 인터페이스용 5.4Gb/s 클럭 및 데이터 복원회로)

  • Kim, Young-Ran;Kim, Kyung-Ae;Lee, Seung-Jun;Park, Sung-Min
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.44 no.2
    • /
    • pp.19-24
    • /
    • 2007
  • With recent advancement of high-speed, multi-gigabit data transmission capabilities, serial links have been more widely adopted in industry than parallel links. Since the parallel link design forces its transmitter to transmit both the data and the clock to the receiver at the same time, it leads to hardware's intricacy during high-speed data transmission, large power consumption, and high cost. Meanwhile, the serial links allows the transmitter to transmit data only with no synchronized clock information. For the purpose, clock and data recovery circuit becomes a very crucial key block. In this paper, a 5.4Gbps half-rate bang-bang CDR is designed for the applications of high-speed graphic DRAM interface. The CDR consists of a half-rate bang-bang phase detector, a current-mirror charge-pump, a 2nd-order loop filter, and a 4-stage differential ring-type VCO. The PD automatically retimes and demultiplexes the data, generating two 2.7Gb/s sequences. The proposed circuit is realized in 66㎚ CMOS process. With input pseudo-random bit sequences (PRBS) of $2^{13}-1$, the post-layout simulations show 10psRMS clock jitter and $40ps_{p-p}$ retimed data jitter characteristics, and also the power dissipation of 80mW from a single 1.8V supply.

A Study on Framework to offer the differentiated Optical QoS Service in the Next-Generation WDM Optical Internet Backbone Network (차세대 WDM 광 인터넷 백본망에서 차등화된 광 QoS 서비스 제공 프레임워크 연구)

  • Kim Yong-Seoug;Ryu Shi-Kook;Lee Jae-Dong;Kim Sung-Un
    • The KIPS Transactions:PartC
    • /
    • v.12C no.6 s.102
    • /
    • pp.881-890
    • /
    • 2005
  • Over for the past 10 years, the increase in geometric progression for the internet traffic, has allowed the IP protocol framework to be the most important network technology. In addition, the internet service is being developed as a service mode differentiated, aiming to support the new-mode real-time multimedia services such as internet phone, video conference, cyber reality, and internet game, focusing on offering a latest service. These days, aiming to solve the need for broad bandwidth along with guaranteeing QoS, the WDM technology of offering multiple gigabit wavelengths is emerging as the core technology of next-generation optical internet backbone network. In the next-generation optical internet backbone network based on WDM, the QoS framework is one of fore subjects aiming to offer a service of guaranteeing QoS This study analyzes the requirements of performance related to QoS framework in IP Subnet and in WDM optical backbone network, and suggests optical QoS service framework differentiated. in order to guarantee end-to-end QoS through the next-generation optical internet backbone network, using GMPLS control protocol.

Implementation of a TCP/IP Offload Engine Using High Performance Lightweight TCP/IP (고성능 경량 TCP/IP를 이용한 소프트웨어 기반 TCP/IP 오프로드 엔진 구현)

  • Jun, Yong-Tae;Chung, Sang-Hwa;Yoon, In-Su
    • Journal of KIISE:Computing Practices and Letters
    • /
    • v.14 no.4
    • /
    • pp.369-377
    • /
    • 2008
  • Today, Ethernet technology is rapidly developing to have a bandwidth of 10Gbps beyond 1Gbps. In such high-speed networks, the existing method that host CPU processes TCP/IP in the operating system causes numerous overheads. As a result of the overheads, user applications cannot get the enough computing power from the host CPU. To solve this problem, the TCP/IP Offload Engine(TOE) technology was emerged. TOE is a specialized NIC which processes the TCP/IP instead of the host CPU. In this paper, we implemented a high-performance, lightweight TCP/IP(HL-TCP) for the TOE and applied it to an embedded system. The HL-TCP supports existing fundamental TCP/IP functions; flow control, congestion control, retransmission, delayed ACK, processing out-of-order packets. And it was implemented to utilize Ethernet MAC's hardware features such as TCP segmentation offload(TSO), checksum offload(CSO) and interrupt coalescing. Also we eliminated the copy overhead from the host memory to the NIC memory when sending data and we implemented an efficient DMA mechanism for the TCP retransmission. The TOE using the HL-TCP has the CPU utilization of less than 6% and the bandwidth of 453Mbps.