• Title/Summary/Keyword: gate metal

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Monte Carlo simulation of the electronic portal imaging device using GATE

  • Chung, Yong-Hyun;Baek, Cheol-Ha;Lee, Seung-Jae
    • Journal of the Korean Society of Radiology
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    • v.1 no.3
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    • pp.11-16
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    • 2007
  • In this study, the potential of a newly developed simulation toolkit, GATE for the simulation of electronic portal imaging devices (EPID) in radiation therapy was evaluated by characterizing the performance of the metal plate/phosphor screen detector for EPID. We compared the performances of the GATE simulator against MCNP4B code and experimental data obtained with the EPID system in order to validate its use for radiation therapy.

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Improvement of Electrical Properties of Diamond MIS (Metal-Insulator- Semiconductor) Interface by Gate Insulator and Application to Metal-Insulator- Semiconductor Field Effect Transistors (게이트 절연막에 의한 다이아몬드 MIS (Metal-Insulator-Semiconductor) 계면의 전기적 특성 개선과 전계효과 트랜지스터에의 응용)

  • Yun, Young
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.14 no.6
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    • pp.648-654
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    • 2003
  • Diamond MIS(Metal-Insulator-Semiconductor) diodes and MISFETs(Metal-Insulator-Semiconductor Field Effect Transistors) were fabricated by employing various fluorides as gate insulator, and their electrical properties were closely investigated by means of C-V measurements. The A1/BaF$_2$/diamond MIS structure exhibited outstanding electrical properties. The MIS diode showed a very low surface state density of ∼10$\^$10//$\textrm{cm}^2$ eV near the valence band edge, and the observed effective mobility(${\mu}$$\_$eff/) of the MISFET was 400 $\textrm{cm}^2$/Vs, which is the highest value obtained until now in the diamond FET. From the chemiphysical point of view, the above result might be explained by the reduction of adsorbed-oxygen on the diamond surface via strong chemical reaction by the constituent Ba atom in the insulator during the film deposition(Oxygen-Gettering Effect).

A study on Characteristics of Molten Metal Flow in Vacuum DieCasting by Numerical Analysis (수치해석에 의한 진공다이캐스팅에서의 용탕 유동특성 연구)

  • Park, Jin-Young;Lim, Kwan-Woo;Lee, Kwang-Hak;Kim, Sung-Bin;Kim, Eok-Soo;Park, Ik-Min
    • Journal of Korea Foundry Society
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    • v.27 no.4
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    • pp.153-158
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    • 2007
  • Molten metal flow in vacuum die casting was characterized by a numerical analysis. The VOF method was used to simulate the filling behaviors of molten metal during filling process. The various vacuum degrees of no vacuum(760 mmHg), 650, 500, 250 and 60mmHg were artificially applied in cavity. And the filling behaviors of molten metal with the applied vacuum conditions were simulated and compared with those of experiment. The results showed that molten metal was partially filled into cavity when vacuum was applied and the filling length of molten metal in cavity was increased with increasing applied reduced pressure in cavity. Also, the simulated filling behaviors of molten metal were apparently similar to those of experiment, indicating the numerical analysis developed in this study was highly effective. Through the result of fluid flow simulation, both relation equations of filling length and filling velocity with the variation of pressure conditions in cavity were calculated respectively and the internal gas contents of casting was significantly reduced by the modification of vacuum gate system.

Analysis on Subthreshold Swing of Asymmetric Junctionless Double Gate MOSFET for Parameters for Gaussian Function (가우스 함수의 파라미터에 따른 비대칭형 무접합 이중 게이트 MOSFET의 문턱전압 이하 스윙 분석)

  • Jung, Hakkee
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.35 no.3
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    • pp.255-263
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    • 2022
  • The subthreshold swing (SS) of an asymmetric junctionless double gate (AJLDG) MOSFET is analyzed by the use of Gaussian function. In the asymmetric structure, the thickness of the top/bottom oxide film and the flat-band voltages of top gate (Vfbf) and bottom gate (Vfbb) could be made differently, so the change in the SS for these factors is analyzed with the projected range and standard projected deviation which are parameters for the Gaussian function. An analytical subthreshold swing model is presented from the Poisson's equation, and it is shown that this model is in a good agreement with the numerical model. As a result, the SS changes linearly according to the geometric mean of the top and bottom oxide film thicknesses, and if the projected range is less than half of the silicon thickness, the SS decreases as the top gate oxide film is smaller. Conversely, if the projected range is bigger than a half of the silicon thickness, the SS decreases as the bottom gate oxide film is smaller. In addition, the SS decreases as Vfbb-Vfbf increases when the projected range is near the top gate, and the SS decreases as Vfbb-Vfbf decreases when the projected range is near the bottom gate. It is necessary that one should pay attention to the selection of the top/bottom oxide thickness and the gate metal in order to reduce the SS when designing an AJLDG MOSFET.

Tungsten Silicide ($WSi_2$) for Alternate Gate Metal in Metal-Oxide-Semiconductor (MOS) Devices (금속-산화막-반도체 소자에서 대체 게이트 금속인 텅스텐 실리사이드의 특성 분석)

  • 노관종;윤선필;양성우;노용한
    • Proceedings of the IEEK Conference
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    • 2000.06b
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    • pp.64-67
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    • 2000
  • Tungsten silicide(WSi$_2$) is proposed for the alternate gate electrode of ULSI MOS devices. Good structural property and low resistivity of WSi$_2$ deposited by a low pressure chemical vapor deposition(LPCVD) method directly on SiO$_2$ is obtained after annealing. Especially, WSi$_2$-SiO2 interface remains flat after annealing tungsten silicide at high temperature. Electrical characteristics of annealed WSi$_2$-SiO$_2$-Si(MOS) capacitors were improved in view of charge trapping.

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A Self-Consistent Analytic Threshold Voltage Model for Thin SOI N-channel MOSFET

  • Choi, Jin-Ho;Song, Ho-Jun;Suh, Kang-Deog;Park, Jae-Woo;Kim, Choong-Ki
    • Proceedings of the KIEE Conference
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    • 1990.11a
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    • pp.88-92
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    • 1990
  • An accurate analytical threshold model is presented for fully depleted SOI which has a Metal-Insulator-Semiconductor-Insulator-Metal structure. The threshold voltage is defined as the gate voltage at which the second derivative of the inversion charge with respect to the gate voltage is maximum. Therefore the model is self-consistent with the measurement scheme. Numerical simulations show good agreement with the model with less than 3% error.

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$H_2$ sensor for detecting hydrogen in DI water using Pd membrane (발전기 스테이터의 냉각코일에 pinhole 발생을 검지 할 수 있는 수소센서 개발)

  • Choi, Sie-Young
    • Proceedings of the KIEE Conference
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    • 1999.11b
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    • pp.442-445
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    • 1999
  • In this work, to detect of hydrogen in DI water in the generator area of nuclear power plants was fabricated Pd/Pt gate MISFET sensor using Pd membrane. $H_2$ permeation through Pd accounts for external mass transfer, surface adsorption and desorption, transitions to and from the bulk metal, and diffusion within the metal. The identification of pinholes in the generator area of plant is an important safety consideration, as hydrogen build-up gives rise to explosion. For this type of application the sensor needs to be isolated in DI water, accordingly, a Pd membrane was used to separate the DI water. The hydrogen in the DI water was then absorbed on the Pd thin film and diffused into the oil through the thin film. The Pd/Pt gate MISFET sensor, encapsulated by oil, will thereby detect permeated hydrogen.

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A study on application of dimension accuracy compensation by CAD (CAD에 의한 치수정밀 보정값 적용에 관한 연구)

  • Lee, Si-heon;Won, Si-tae
    • Design & Manufacturing
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    • v.2 no.1
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    • pp.11-14
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    • 2008
  • we can save a development cost and time as computer was used in tool and die design of car fields in die manufacture process. Dimension accuracy errors such as springback, springgo, overcrown and twist were reduced product accuracy and caused trouble to assembly each parts of car. In this paper, CADCEUS was used to modify and optimize results of deflection for a tail gate panel of car parts in order to reduce dimension accuracy errors by springback in sheet metal forming. As CADCEUS was used to apply for a tail gate panel, the time for quality to improve was reduced to 30%.

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Performance of Differential Field Effect Transistors with Porous Gate Metal for Humidity Sensors

  • Lee, Sung-Pil;Chowdhury, Shaestagir
    • Journal of Sensor Science and Technology
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    • v.8 no.6
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    • pp.434-439
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    • 1999
  • Differential field effect transistors with double gate metal for integrated humidity sensors have been fabricated and the drain current drift characteristics to relative humidity have been investigated. The aspect ratio was 250/50 for both transistors to get the current difference between the sensing device and non-sensing one. The normalized drain current of the fabricated humidity sensitive field effect transistors increases from 0.12 to 0.3, as relative humidity increases from 30% to 90%.

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Analysis of Interfacial Layer between Alumina and Silica/Silicon Substrate (알루미나와 실리카/실리콘 기판의 계면 분석)

  • 최일상;김영철;장영철
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2002.05a
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    • pp.252-254
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    • 2002
  • Metal oxides with high dielectric constants have the potential to expend scaling of transistor gate capacitance beyond that of ultrathin silicon dioxide. However, during deposition of most metal oxides on silicon, an interfacial region of SiOx is formed and limits the specific capacitance of the gate structure. We deposisted aluminum oxide and examined the composition of the interfacial layer by employing high-resolution X-ray photoelectron spectroscopy and X-ray reflectivity. We find that the interfacial region is not pure SiO$_2$, but is composed of a complex depth-dependent ternary oxide of $AlSi_xO_y$ and the pure SiO$_2$.

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