• Title/Summary/Keyword: gain-bandwidth

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A High Swing Range, High Bandwidth CMOS PGA and ADC for IF QPSK Receiver Using 1.8V Supply

  • Lee, Woo-Yol;Lim, Jong-Chul;Park, Hee-Won;Hong, Kuk-Tae;Lee, Hyeong-Soo
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제5권4호
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    • pp.276-281
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    • 2005
  • This paper presents a low voltage operating IF QPSK receiver block which is consisted of programmable gain amplifier (PGA) and analog to digital converter. This PGA has 6 bit control and 250MHz bandwidth, $0{\sim}20\;dB$ gain range. Using the proposed PGA architecture (low distortion gain control switch block), we can process the continuous fully differential $0.2{\sim}2.5Vpp$ input/output range and 44MHz carrier with 2 MHz bandwidth signal at 1.8V supply voltage. Using the sub-sampling technique (input freq. is $44{\sim}46MHz$, sampling freq. is 25MHz), we can process the IF QPSK signal ($44{\sim}46MHz$) which is the output of the 6 bit PGA. We can get the SNDR 35dB, which is the result of PGA and ADC at full gain mode. We fabricated the PGA and ADC and the digital signal processing block of the IF QPSK with the 0.18um CMOS MIM process 1.8V Supply.

High-Efficiency, High-Gain, Broadband Quasi-Yagi Antenna and Its Array for 60-GHz Wireless Communications

  • Ta, Son Xuat;Kang, Sang-Gu;Han, Jea Jin;Park, Ikmo
    • Journal of electromagnetic engineering and science
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    • 제13권3호
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    • pp.178-185
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    • 2013
  • This paper introduces a high-efficiency, high-gain, broadband quasi-Yagi antenna, and its four-element array for use in 60-GHz wireless communications. The antenna was fed by a microstrip-to-slotline transition consisting of a curved microstripline and a circular slot to allow broadband characteristics. A corrugated ground plane was employed as a reflector to improve the gains in the low-frequency region of the operation bandwidth, and consequently, to reduce variation. The single antenna yielded an impedance bandwidth of 49 to 69 GHz for $|S_{11}|$ <-10dB and a gain of >12.0 dBi while the array exhibited a bandwidth of 52 to 68 GHz and a gain greater than 15.0 dBi. Both proposed designs had small gain variations (${\pm}0.5$ dBi) and high radiation efficiency (>95%) in the 60-GHz bands. The features of the proposed antenna were validated by designing, fabricating, and testing a scaled-up configuration of the single antenna at the 15-GHz band. The measurements resulted in an impedance bandwidth of 13.0 to 17.5 GHz for $|S_{11}|$ <-10dB, a gain of 10.1 to 13.2 dBi, and radiation efficiency in excess of 88% within this bandwidth. Additionally, the 15-GHz antenna yielded quite symmetric radiation profiles in both E- and H-planes, with a high front-to-back ratio.

Design of a Low-Profile, High-Gain Fabry-Perot Cavity Antenna for Ku-Band Applications

  • Nguyen, Truong Khang;Park, Ikmo
    • Journal of electromagnetic engineering and science
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    • 제14권3호
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    • pp.306-313
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    • 2014
  • A Fabry-Perot resonator cavity antenna for Ku-band application is presented in this paper. The Fabry-Perot cavity is formed by a ground plane and a frequency selective surface (FSS) made of a circular hole array. The cavity resonance is excited by a single-feed microstrip patch located inside the cavity. The measured results show that the proposed antenna has an impedance bandwidth of approximately 13% ($VSWR{\leq}2$) and a 3-dB gain bandwidth of approximately 7%. The antenna produces a maximum gain of 18.5 dBi and good radiation patterns over the entire 3-dB gain bandwidth. The antenna's very thin profile, high directivity, and single excitation feed make it promising for use in wireless and satellite communication applications in a Ku-band frequency.

H모양 개구면에 스트립 급전된 광대역 및 고이득 패치 안테나 (The Wide-band and High-gain Strip Patch Antenna coupled with a H-shaped Aperture)

  • 신호섭;김남
    • 대한전자공학회논문지TC
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    • 제38권4호
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    • pp.27-37
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    • 2001
  • 광대역과 고이득과 낮은 교차 편파 레벨을 가지는 H자 모양의 개구면을 가진 스트립 급전된 패치 안테나를 설계 및 제작하고 정재파비, 스미스챠트 임피던스 특성, 동일/교차 편파 방사패턴, 이득 등을 측정하였다. 본 안테나의 측정된 대역폭(VSWR<2.0)은 47.1%이다. 또한 후방방사를 줄이고 이득을 높이기 위해 반사판을 사용하였을 때 교차 편파 레벨은 E-plane에서 -18.2 dB이하이고 H plane에서 -25.7 dB이하이다. 그리고 최대 이득은 2.05 GHz의 주파수에서 10.4 dB이며, 3 dB gain 대역폭은 중심주파수 2.17 GHz에서 24%의 광대역폭을 가짐을 알 수 있었다. 본 안테나는 광대역을 필요로 하는 이동통신, 무선 LAN, RF 통신시스템 등에 사용될 수 있다.

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병렬연결법에 의한 1.8V CMOS Self-bias 고속 차동증폭기의 이득 개선 (The Gain Enhancement of 1.8V CMOS Self-bias High-speed Differential Amplifier by the Parallel Connection Method)

  • 방준호
    • 전기학회논문지
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    • 제57권10호
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    • pp.1888-1892
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    • 2008
  • In this paper, a new parallel CMOS self-bias differential amplifier is designed to use in high-speed analog signal processing circuits. The designed parallel CMOS self-bias differential amplifier is developed by using internal biasing circuits and the complement gain stages which are parallel connected. And also, the parallel architecture of the designed parallel CMOS self-bias differential amplifier can improve the gain and gain-bandwidth product of the typical CMOS self-bias differential amplifier. With 1.8V $0.8{\mu}m$ CMOS process parameter, the results of HSPICE show that the designed parallel CMOS self-bias differential amplifier has a dc gain and a gain-bandwidth product of 64 dB and 49 MHz respectively.

새로운 구조의 저전압 고이득 트랜스레지스턴스 증폭기 설계 (The Novel Low-Voltage High-Gain Transresistance Amplifier Design)

  • 김병욱;방준호;조성익
    • 전기학회논문지
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    • 제56권12호
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    • pp.2257-2261
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    • 2007
  • A new CMOS transresistance amplifier for low-voltage analog integrated circuit design applications is presented. The proposed transresistance amplifier circuit based on common-source and negative feedback topology is compared with other recent reported transresistance amplifier. The proposed transresistance amplifier achieves high transresistance gain, gain-bandwidth with the same input/output impedance and the minimum supply voltage $2V_{DSAT}+V_T$. Hspice simulation using 1.8V TSMC $0.18{\mu}m$ CMOS technology was performed and achieved $59dB{\Omega}$ transresistance gain which is above the maximum about $18dB{\Omega}$ compared to transresistance gain of the reported circuit.

광대역 특성을 가지는 적층 구조의 Bow-Tie 안테나 설계 (A Design of stacked bow-tie antenna for broadband characteristics)

  • 김진;최성열;박경수;이희복;고영호
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 추계종합학술대회 논문집(1)
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    • pp.497-500
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    • 2000
  • There are many researches to increase bandwidth of the microstrip patch antenna for wireless LAN. In spite of broad bandwidth, Bow-Tie microstrip patch antenna, broadband microstrip patch antenna, has disadvantages that are low gain and big size. In this paper, stacked Bow-Tie microstrip patch antenna for wireless LAN is designed in 5.725∼5.825㎓ band. This antenna has characteristics that are broadband bandwidth, high gain and small size compared with microstrip patch antenna. In simulated results, the return loss is -34.2㏈ at 5.78㎓ and bandwidth is 11.345% for VSWR 2:1 and 7.75% for VSWR 1.5:1. In measured results, the return loss is -38.45㏈ at 5.78㎓ and bandwidth is 13% for VSWR 2:1 and 5.6% for VSWR 1.5:1. It has 59.37$^{\circ}$-3㏈ beam width and 6.5㏈ gain.

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대역폭과 이득이 향상된 이중 다이폴 준-야기 안테나 설계 (Design of Double Dipole Quasi-Yagi Antenna with enhanced bandwidth and gain)

  • 여준호
    • 한국정보통신학회논문지
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    • 제21권2호
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    • pp.252-258
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    • 2017
  • 본 논문에서는 변형된 밸런과 두 개의 도파기를 이용하여 이중 다이폴 준-야기 안테나(double-dipole quasi-Yagi antenna; DDQYA)의 대역폭과 이득을 향상시키는 방법에 관하여 연구하였다. 제안된 DDQYA 안테나는 두 개의 서로 다른 길이의 스트립 다이폴 안테나, 접지 반사기, 두 개의 도파기로 구성된다. 대역폭을 늘리기 위해 변형된 밸런을 사용하였고, 중간 및 고주파수 대역에서 이득을 높이기 위해 두 개의 도파기를 추가하였다. 첫 번째 도파기의 길이와 폭에 따른 안테나의 특성 변화를 분석하여 1.60-2.90 GHz 대역에서 7 dBi이상의 이득을 얻기 위한 최종 설계 변수를 얻었다. 최종 설계된 DDQYA 안테나를 FR4 기판 상에 제작하고 특성을 실험한 결과 전압 정재파비(voltage standing wave ratio; VSWR)가 2 이하인 대역은 1.57-3.00 GHz이고, 1.60-2.90 GHz 대역에서 이득이 7.1-7.8 dBi로 7 dBi 이상을 유지하는 것을 확인하였다.

정착시간과 레귤레이션 특성을 개선한 LDO(Low Dropout Regulator)의 설계 (A Design of LDO(Low Dropout Regulator) with Enhanced Settling Time and Regulation Property)

  • 박경수;박재근
    • 전기학회논문지P
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    • 제60권3호
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    • pp.126-132
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    • 2011
  • A conventional LDO(Low Dropout Regulator) uses one OPAMP and one signal path. This means that OPAMP's DC Gain and Bandwidth can't optimize simultaneously within usable power. This also appears that regulation property and settling time of LDO can't improve at the same time. Based on this idea, a proposed LDO uses two OPAMP and has two signal path. To improve regulation property, OPAMP where is used in the path which qualities DC gain on a large scale, bandwidth designed narrowly. To improve settling time, OPAMP where is used in the path which qualities DC gain small, bandwidth designed widely. A designed LDO used 0.5um 1P2M process and provided 200mA of output current. A line regulation and load regulation is 12.6mV/V, 0.25mV/mA, respectively. And measured settling time is 1.5us in 5V supply voltage.

ATM망에서의 멀티미디어 트래픽 제어 (Multimedia traffic management in ATM networks)

  • 안병준;이형호
    • 한국정보과학회:학술대회논문집
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    • 한국정보과학회 1999년도 가을 학술발표논문집 Vol.26 No.2 (3)
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    • pp.369-374
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    • 1999
  • The problem of bandwidth allocation and routing in VP based ATM networks was studied. A priori reservation of resources for VP's reduces the statistical multiplexing gain, resulting in increased Call Blocking Probability (CBP). The focus of this study is on how to reduce CBP by the efficient bandwidth allocation and routing algorithms. Equivalent capacity concept was used to calculate the required bandwidth by the call. and the effect of traffic dispersion was explored to achieve more statistical gain. A cost-effective traffic dispersion routing algorithm, CED, was designed. The algorithm finds the optimal number of dispersion paths for a call, where the gain balances the dispersion cost. Simulation study showed that CED could significantly reduce the CBP.

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