• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.8
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• pp.1877-1886
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• 2010

In this paper, we design a redundancy control circuit for 1T-SRAM repair using electrical fuse programming. We propose a dual port eFuse cell to provide high program power to the eFuse and to reduce the read current of the cell by using an external program supply voltage when the supply power is low. The proposed dual port eFuse cell is designed to store its programmed datum into a D-latch automatically in the power-on read mode. The layout area of an address comparison circuit which compares a memory repair address with a memory access address is reduced approximately 19% by using dynamic pseudo NMOS logic instead of CMOS logic. Also, the layout size of the designed redundancy control circuit for 1T-SRAM repair using electrical fuse programming with Dongbu HiTek's $0.11{\mu}m$ mixed signal process is $249.02 {\times}225.04{\mu}m^{2}$.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.67 no.5
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• pp.644-650
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• 2018

According to a miniaturization and integration of electric device, a little size of fuse satisfying the current carrying capacity as well as an explosive tolerance and current interrupt rating are required. Fe-Ni alloy is applied to decrease an oxidation of fuse elements. A resistance and T.C.R(temperature coefficient of resistance) of a fuse are analyzed by changing a content of Ni And full rated current I-T curve from 1A to 6.3A has been tested. In order to an explosive energy, a straight wire type is selected to reduce a fuse melting time. An interrupt rating test was conducted by changing a content of Ni and the optimal content of Ni is to be 40%.

• Proceedings of the IEEK Conference
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• 2002.07b
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• pp.778-781
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• 2002

In this paper, we designed the anti-fuse program circuit, and there are an anti-fuse program/sense/latch circuit, a negative voltage generator, power-up circuit and etc. in this circuit. An output voltage of a negative voltage generator is about -4,51V. We detected certainly it regardless of simulation result power rise time or temperature change to detect the anti-fuse program state of an anti-fuse program/sense/latch circuit and were able to know what performed a steady action. And as a result of having done a simulation while will change a resistance value voluntarily in order to check an anti-fuse resistance characteristic of this circuit oneself, it recognized as a programmed anti-fuse until 23k$\Omega$, and we were able to know that this circuit was a lot of margin than general anti-fuse resistance 500$\Omega$. Therefore, the anti-fuse program circuit of this study showed that was able to apply for configuration of the programmable logic device.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.1
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• pp.183-190
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• 2010

We propose an eFuse one-time programmable (OTP) memory cell based on a logic process, which is programmable by an external program voltage. For the conventional eFuse OTP memory cell, a program datum is provided with the SL (Source Line) connected to the anode of the eFuse going through a voltage drop of the SL driving circuit. In contrast, the gate of the NMOS program transistor is provided with a program datum and the anode of the eFuse with an external program voltage (FSOURCE) of 3.8V without any voltage drop for the newly proposed eFuse cell. The FSOURCE voltage of the proposed cell keeps either 0V or the floating state at read mode. We propose a clamp circuit for being biased to 0V when the voltage of FSOURCE is in the floating state. In addition, we propose a VPP switching circuit switching between the logic VDD (=1.8V) and the FSOURCE voltage. The layout size of the designed eFuse OTP memory IP with Dongbu HiTek's $0.15{\mu}m$ generic process is $359.92{\times}90.98{\mu}m^2$.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.8 no.4
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• pp.310-318
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• 2015

In this paper, dual-port eFuse OTP (one-time programmable) memory cells with smaller cell sizes are used, a single VREF (reference voltage) is used in the designed eFuse OTP IP (intellectual property), and a BL (bit-line) sensing circuit using a S/A (sense amplifier) based D F/F is proposed. With this proposed sensing technique, the read current can be reduced to 3.887mA from 6.399mA. In addition, the sensing resistances of a programmed eFuse cell in the program-verify-read and read mode are also reduced to $9k{\Omega}$ and $5k{\Omega}$ due to the analog sensing. The layout size of the designed 32-bit eFuse OTP memory is $187.845{\mu}m{\times}113.180{\mu}m$ ($=0.0213{\mu}m2$), which is confirmed to be a small-area implementation.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.7
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• pp.1371-1378
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• 2009

We propose a low-power eFuse one-time programmable (OTP) memory cell based on a logic process. The eFuse OTP memory cell uses separate transistors optimized at program and read mode, and reduces an operation current at read mode by reducing parasitic capacitances existing at both WL and BL. Asynchronous interface, separate I/O, BL SA circuit of digital sensing method are used for a low-power and small-area eFuse OTP memory IP. It is shown by a computer simulation that operation currents at a logic power supply voltage of VDD and at I/O interface power supply voltage of VIO are 349.5${\mu}$A and 3.3${\mu}$A, respectively. The layout size of the designed eFuse OTP memory IP with Dongbu HiTek's 0.18${\mu}$m generic process is 300 ${\times}$557${\mu}m^2$.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.8_9
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• 2009

This paper shows us the analysis of the Recloser-Fuse coordination in power distribution system. Recloser has been installed with fuse to coordinate in power distribution system to protect against fault current efficiently. However, in power distribution system with SFCL, fault current couldn't be clear if occurred it as the operation of the Recloser-Fuse coordination couldn't be done. Therefore, this paper analysed the operation of the Recloser-Fuse coordination and found the method of the Recloser-Fuse coordination in power distribution system with SFCL using PSCAD/EMTDC.

• Journal of Drive and Control
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• v.11 no.4
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• pp.32-38
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• 2014

The hydraulic fuse, which responds to the suddenly increased flow on rupture of a line and shuts off the fluid flow, would prevent large spillage of liquid. The quick-acting hydraulic fuse, which is mainly composed of a poppet, a seat, and a spring, must be designed to minimize the leaked flow and to prevent high collision speed between the poppet and seat during fuse operation on a line rupture. The optimal design parameters of a quick-acting hydraulic fuse were searched using the genetic algorithm and the complex method that are kinds of constrained direct search methods. The dynamic behavior of a quick-acting hydraulic fuse was researched using computer simulations that applied the obtained optimal design parameters.

• Journal of Sensor Science and Technology
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• v.14 no.2
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• pp.91-95
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• 2005

A fiber Fabry-Perot interferometric sensor for the measurement of current flowing into a small fuse have been studied. The proposed current sensor was fabricated with a fiber Fabry-Perot interferometer attached close to a fuse line inside a small fuse. The fiber Fabry-Perot interferometer used in the experiment had the 10 mm cavity length and the 3.5 % reflectance mirrors. The phase shift of the output signal of the current sensor was proportional to the square of current applied to the fuse and the sensitivity of the current sensor was 0.87 degree/$mA^{2}$. The experiment results show that this sensor can be used for measuring current flowing into the fuse.

• Journal of the Korean Society of Industry Convergence
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• v.22 no.2
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• pp.235-241
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• 2019

The shoe manufacturing process is very low compared to other industries due to the labor-intensive process. As automation and smart factories are becoming more and more automated, changes in the shoe manufacturing process are also needed. In this paper, we want to standardize the fuse manufacturing process by modularizing it. First, we defined the terms of shoeupper and fuse process, the shoe upper fuse process by function and classified it as a modular process. The fuse process can be modularized with pattern supply module, pattern recognition module, pattern laminate module, pattern waiting module, adhesion module, heat pressing module, transmission module, etc.