• Title/Summary/Keyword: full-information

Search Result 3,671, Processing Time 0.032 seconds

Communication Network Architectures for Southwest Offshore Wind Farm (한국 서남 해상 풍력발전단지 통신망 연구)

  • Ahmed, Mohamed A.;Kim, Young-Chon
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.42 no.1
    • /
    • pp.88-97
    • /
    • 2017
  • With the increasing of the penetration rate of large-scale wind farms, a reliable, highly available and cost-effective communication network is needed. As the failure of a WF communication network will significantly impact the control and real-time monitoring of wind turbines, network reliability should be considered into the WF design process. This paper analyzes the network reliability of different WF configurations for the Southwest Offshore project that is located in Korea. The WF consists of 20 WTs with a total capacity of 60 MW. In this paper, the performance is compared according to a variety of indices such as network unavailability, mean downtime and network cost. To increase the network reliability, partial protection and full protection were investigated as strategies that can overcome the impact of a single point of failure. Furthermore, the reliability performances of different network architectures are analyzed, evaluated and compared.

Implementation of Acoustic Echo Canceller Using Robust PBFLMS in noises with ARM9EJ-S Core (ARM9EJ-S Core를 이용한 PBFLMS 음향 반향 제거기 구현)

  • Yang, Yong-Ho;Kim, Jong-Hak;Kim, Jeong-Joong;Lee, In-Sung
    • Proceedings of the IEEK Conference
    • /
    • 2006.06a
    • /
    • pp.357-358
    • /
    • 2006
  • We propose the robust PBFLMS in noises, which is the enhanced acoustic echo canceller using ACPBF-LMS(Alternative Constrained Partitioned Block Frequency domain Least Mean Square) algorithm. The defect of the block structure filtering is the deterioration of convergence efficiency from noise and interference. To improve the performance of convergence efficiency, noise effect should be reduced. The new method of reducing noise effect is proposed, which apply the estimated background noise to adaptive filter step size. By experiments, the proposed acoustic echo canceller has TCL of 50dB, and always provides faster convergence speed and lower complexity than the full-tap NLMS. We also carried out an implementation of PBFLMS using ARM9EJ-S.

  • PDF

A Study on Genetic Algorithm of Concurrent Spare Part Selection for Imported Weapon Systems (국외구매 무기체계에 대한 동시조달수리부속 선정 유전자 알고리즘 연구)

  • Cho, Hyun-Ki;Kim, Woo-Je
    • Journal of Korean Institute of Industrial Engineers
    • /
    • v.36 no.3
    • /
    • pp.164-175
    • /
    • 2010
  • In this study, we developed a genetic algorithm to find a near optimal solution of concurrent spare parts selection for the operational time period with limited information of weapon systems purchased from overseas. Through the analysis of time profiles related with system operations, we first define the optimization goal which maintains the expected system operating rate under the budget restrictions, and the number of failures and the lead time for each spare part are used to calculate the estimated total down time of the system. The genetic algorithm for CSP selection shows that the objective function minimizes the estimated total down time of systems with satisfying the restrictions. The method provided by this study can be applied to the generalized model of CSP selection for the systems purchased from overseas without provision of their full structure and adequate information.

A single-clock-driven gate driver using p-type, low-temperature polycrystalline silicon thin-film transistors

  • Kim, Kang-Nam;Kang, Jin-Seong;Ahn, Sung-Jin;Lee, Jae-Sic;Lee, Dong-Hoon;Kim, Chi-Woo;Kwon, Oh-Kyong
    • Journal of Information Display
    • /
    • v.12 no.1
    • /
    • pp.61-67
    • /
    • 2011
  • A single-clock-driven shift register and a two-stage buffer are proposed, using p-type, low-temperature polycrystalline silicon thin-film transistors. To eliminate the clock skew problems and to reduce the burden of the interface, only one clock signal was adopted to the shift register circuit, without additional reference voltages. A two-stage, p-type buffer was proposed to drive the gate line load and shows a full-swing output without threshold voltage loss. The shift register and buffer were designed for the 3.31" WVGA ($800{\times}480$) LCD panel, and the fabricated circuits were verified via simulations and measurements.

A Metamaterial-Based Handset Antenna with the SAR Reduction

  • Kahng, Sungtek;Kahng, Kyungseok;Yang, Inkyu;Park, Taejoon
    • Journal of Electrical Engineering and Technology
    • /
    • v.9 no.2
    • /
    • pp.622-627
    • /
    • 2014
  • A method to reduce the specific absorption rate(SAR) of the antenna for WiMAX mobile communication is proposed in this paper. The SAR reduction is achieved by miniaturizing the physical size of the antenna for the given resonance frequency by devising a metamaterial-composite right- and left-handed(CRLH) configuration-based radiator much smaller than the quarter-guided wavelength adopted a lot in the conventional planar inverted F antenna(PIFA) or modified monopole antenna. The proposed antenna is placed near the head-phantom and its SAR is evaluated by the full-wave simulations(SEMCAD X), where the metamaterial-inspired antenna is shown to have the lower value than a modified monopole as the reference in terms of the SAR.

A Fast SIFT Implementation Based on Integer Gaussian and Reconfigurable Processor

  • Su, Le Tran;Lee, Jong Soo
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
    • /
    • v.2 no.3
    • /
    • pp.39-52
    • /
    • 2009
  • Scale Invariant Feature Transform (SIFT) is an effective algorithm in object recognition, panorama stitching, and image matching, however, due to its complexity, real time processing is difficult to achieve with software approaches. This paper proposes using a reconfigurable hardware processor with integer half kernel. The integer half kernel Gaussian reduces the Gaussian pyramid complexity in about half [] and the reconfigurable processor carries out a parallel implementation of a full search Fast SIFT algorithm. We use a low memory, fine grain single instruction stream multiple data stream (SIMD) pixel processor that is currently being developed. This implementation fully exposes the available parallelism of the SIFT algorithm process and exploits the processing and I/O capabilities of the processor which results in a system that can perform real time image and video compression. We apply this novel implementation to images and measure the effectiveness. Experimental simulation results indicate that the proposed implementation is capable of real time applications.

  • PDF

Test Platform for the Development of Optimized Magnetic Devices in High-Performance LDC (고성능 LDC용 최적 자성소자 개발을 위한 Test Platform)

  • Oh, Chang-Yeol;Kim, Yun-Sung;Lee, Young-Dal;Lee, Byoung-Kuk
    • Proceedings of the KIPE Conference
    • /
    • 2012.07a
    • /
    • pp.99-100
    • /
    • 2012
  • 본 논문에서는 차량용 저전압 DC-DC 컨버터 (Low voltage DC-DC Converter, LDC)에 최적화된 자성소자를 개발하기 위한 Test Platform 구축 과정을 제시한다. 현재 연구, 개발된 LDC를 토대로 자성소자 개발에 범용성을 가지는 정격사양을 결정하고 그에 따른 시스템을 구성한다. 또한 시스템에 적용된 위상천이 풀-브리지 (Phase-Shift Full-Bridge, PSFB) 컨버터에서 자성소자가 미치는 영향을 분석한다. 분석 결과를 기반으로 구성한 시스템에서 안정적인 성능 검증을 위한 자성소자의 적정 설계범위를 제시하고, 범용성을 위해 입출력 변화에 따른 자성소자 설계 요소들의 변화 추이를 제시한다.

  • PDF

Efficiency and Fairness in Information System Chargeback (정보시스템 Chargeback에 있어서의 효율성과 공평성의 관계)

  • Yu, Yeong-Jin;An, Jung-Ho
    • Asia pacific journal of information systems
    • /
    • v.1 no.1
    • /
    • pp.117-145
    • /
    • 1991
  • IS changeback is regarded as an offective way to control the usage of computers and communication systems which are very much limited resources and whose costs are very high, In this paper, the problem of combining the optimal chargeback system which guarantees the efficiency with the Rawls'(1971) concept of fairness. Primary conclusion of this paper is that if the value function which represents the contributions of IS user to the firm's profit is evidit and there is no uncertainty about this contribution information, optimality can be achived without any loss of fairness using full cost allocation pricing. But if there is no significant differences among contribution of each user and there is no significant differences among users because of the managerial arbitrariness, From this point of view contingent chargeback system with which manager can find the golden middle between optimality and fairness by adjusting the 'efficiency coefficient' according to his/her organizational characterisics and environments is proposed. A heuristic of finding the appropriate efficiency coefficient is also suggested.

  • PDF

A Distributed Web-Topology for the Wireless Mesh Network with Directional Antennas

  • Ranjitkar, Arun;Ko, Young-Bae
    • KSII Transactions on Internet and Information Systems (TIIS)
    • /
    • v.5 no.1
    • /
    • pp.191-210
    • /
    • 2011
  • Topology management, which includes neighbor discovery, tracking and updating, is a key area that need to be dealt with appropriately to increase network performance. The use of directional antenna in Wireless Mesh Networks is beneficial in constructing backbone networks viewing the properties of directional antenna. The backbone links must be robust to obtain better network performance. In this paper, a simple yet effective topology protocol is presented that performs well compared to its predecessors. Our protocol constructs the topology with the constraints in the number of links per node. The full topology is constructed in two phases. The resultant topology is termed as Web-topology. The topology formed is robust, efficient, and scalable.

Digital Competence As A Component Of Professional And Information Culture Of A Teacher

  • Kharlamov, Mykhailo;Sinelnikov, Ivan;Lysenko, Vladyslav;Yakobenchuk, Nazar;Tkach, Anna;Honcharuk, Оlena
    • International Journal of Computer Science & Network Security
    • /
    • v.21 no.7
    • /
    • pp.169-172
    • /
    • 2021
  • Based on the scientific and pedagogical analysis of the theory and experience of teaching computer science disciplines, the didactic mechanism for ensuring the continuity of the average (full) general and higher professional education of economists for practical implementation innovative technology of personal experience foundation. The pedagogical conditions for the formation of information competence, including laboratory, design, research work, the use of active teaching methods for acquiring management skills in production and activities of the enterprise. An indispensable requirement for the conditions for the implementation of basic of educational programs is the assessment of competencies. With this the goal was to develop criteria and levels of formation information competence of future economists and carried out complex diagnostics.