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On Deploying Relays for Connected Indoor Sensor Networks

  • Zhu, Yanmin;Xue, Cuiyao;Cai, Haibin;Yu, Jiadi;Ni, Lei;Li, Minglu;Li, Bo
    • Journal of Communications and Networks
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    • v.16 no.3
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    • pp.335-343
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    • 2014
  • This paper considers the crucial problem of deploying wireless relays for achieving a connected wireless sensor network in indoor environments, an important aspect related to the management of the sensor network. Several algorithms have been proposed for ensuring full sensing coverage and network connectivity. These algorithms are not applicable to indoor environments because of the complexity of indoor environments, in which a radio signal can be dramatically degraded by obstacles such as walls. We first prove theoretically that the indoor relay placement problem is NP-hard. We then predict the radio coverage of a given relay deployment in indoor environments. We consider two practical scenarios; wire-connected relays and radio-connected relays. For the network with wire-connected relays, we propose an efficient greedy algorithm to compute the deployment locations of relays for achieving the required coverage percentage. This algorithm is proved to provide a $H_n$ factor approximation to the theoretical optimum, where $H_n=1+{\frac{1}{2}}+{\cdots}+{\frac{1}{n}}={\ln}(n)+1$, and n is the number of all grid points. In the network with radio-connected relays, relays have to be connected in an ad hoc mode. We then propose an algorithm based on the previous algorithm for ensuring the connectivity of relays. Experimental results demonstrate that the proposed algorithms achieve better performance than baseline algorithms.

A 20-way Stripline Power Divider for an S band Linear Array Antenna with Low Loss and Low Side Lobe Level (S 대역 선형 배열 안테나 급전회로를 위한 저손실, 저부엽 20-출력 스트립라인 전력분배기)

  • Kwon, Tae-Min;Kim, Dong-Wook
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.47 no.7
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    • pp.128-134
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    • 2010
  • In this paper, a high-power 20-way stripline power divider with low insertion loss and low side lobe level is successfully designed, fabricated and measured as a feed network for an S-band linear array antenna having Dolph-Chebyshev current distribution which has a narrow beam width and very low side lobe level (SLL). The 20-way stripline power divider consists of an 8-way power divider, three 4-way power dividers and three ring hybrids. It utilizes a T-junction structure as a basic element for power dividing. Notches and modified input/output N-to-stripline transitions are used for improving insertion loss and return loss. The fabricated power divider shows insertion loss less than 0.3 ㏈ and rms phase mismatch less than 8o in the full bandwidth. A final 40-way power divider is synthesized by combining symmetrically two 20-way power dividers and is expected to have SLL over 40 dB, based on the measured results of the 20-way power divider.

A Center Biased Cross-Diamond Search Algorithm for Fast Fractional-pel Motion Estimation (고속 부화소 움직임 추정을 위한 중심 지향적 십자 다이아몬드 탐색 알고리즘)

  • Jo, Seong-Hyeon;Lee, Jong-Hwa
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.2
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    • pp.78-84
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    • 2009
  • In general video coding systems, motion estimation (ME) is regarded as a vital component in a video coder as it consumes a large amount of computation resources. Fractional pixel motion estimation can improve the video compression rate at the cost of higher computational complexity. It is based on the experimental results that the sum of absolute differences (SAD) shows parabolic shape and thus can be approximated by using interpolation technique. In this paper, we propose a fast fractional pixel search algorithm by combining SASR (Simplified Adaptive Search Range) and the CBCDS (Center Biased Cross-Diamond Search) pattern with the predicted motion vector. Compare with the fractional pel full search and the CBFPS, the proposed CBCDS algorithms can reduce fractional pel search points up to 81.4%, respectively with the PSNR lost about 0.05dB.

Low-Cost AES Implementation for Wireless Embedded Systems (무선 내장형 시스템을 위한 제비용 AES의 구현)

  • LEE Dong-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.12
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    • pp.67-74
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    • 2004
  • AES is frequently used as a symmetric cryptography algorithm for the Internet. Wireless embedded systems increasingly use more conventional wired network protocols. Hence, it is important to have low-cost implementations of AES for thor The basic architecture of AES unrolls oかy one full cipher round which uses 20 S-boxes together with the key scheduler and the algorithm repeatedly executes it. To reduce the implementation cost further, the folded architecture which uses only eight S-box units was studied in the recent years. In this paper, we will study a low-cost AES implementation for wireless communication technology based on the folded architecture. We first improve the folded architecture to avoid the sixteen bytes of additional state memory. Then, we implemented a single byte architecture where only one S-box unit is used for data encryption and key scheduling. It takes 352 clocks to finish a complete encryption. We found that the maximum clock frequency of its FPGA implementation reaches about 40 MHz. It can achieve about 13 Mbps which is enough for 3G wireless communication technology.

Motion Flow Analysis using Bi-directional Prediction-Independent Framework in MPEG Compressed Domain (압축 영역에서의 양방향 예측 구조를 이용한 움직임 흐름 분석)

  • 김낙우;김태용;최종수
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.41 no.5
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    • pp.13-22
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    • 2004
  • Because video sequence consists of dynamic objects in nature, the object motion in video is an effective feature in describing the contents of video sequence and motion feature plays an important role in video retrieval. In this paper, we propose a method that converts motion vectors (MVs) to a uniform set on MPEG coded domain, independent of the frame type and the direction of prediction, and utilizes these normalized MVs (N-MVs) as motion descriptor to understand video contents. We describe a frame-type independent representation of the various types of frames presented in an MPEG video in which all frames can be considered equivalently, without full-decoding. In the experiments, we show that the proposed method is better than the conventional one in terms of performance.

A Study on Optimal Bit Loading Algorithms for Discrete MultiTone ADSL (DMT 변조방식을 사용하는 ADSL에서의 최적 비트 할당 방식 연구)

  • 이철우;박광철;윤기방;장수영;김기두
    • Journal of the Institute of Electronics Engineers of Korea TE
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    • v.39 no.4
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    • pp.395-402
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    • 2002
  • In the conventional public switched telephone network(PSTN), there are various types of modulation that can be used in ADSL to offer fast data communication, two of which are CAP(Carrierless Amplitude Phase) and DMT(Discrete MultiTone). As we consider the current situation, DMT is getting more predominant in the market than CAP. One of the reasons is that it gives high performance in spite of its high complexity Since DMT divides the full range of bandwidth into 256 sub-channels, it can be highly adaptive in the circumstances, where the problems of attenuation and noise caused by the propagation distance are very crucial. In this paper, a new bit loading algorithm for DMT modulation is proposed. The proposed algorithm can be efficiently implemented in a way that it requires less computation than the conventional modulation techniques. In contrast to the conventional algorithms which perform sorting processing, the proposed algorithm uses look-up tables to reduce the repetition of calculation. Consequently, it is shown that less processing time and lower complexity can be achieved.

Design of a High Performance Built-In Current Sensor using 0.8$\mu\textrm{m}$ CMOS Technology (0.8$\mu\textrm{m}$ CMOS 공정을 이용한 고성능 내장형 전류감지기의 구현)

  • 송근호;한석붕
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.35C no.12
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    • pp.13-22
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    • 1998
  • In this paper, we propose a high-performance BICS(built-in current sensor) which is fabricated in 0.8${\mu}{\textrm}{m}$ single-poly two-metal process for IDDQ testing of CMOS VLSI circuit. The CUT(circuit under test) is 4-bit full adder with a bridging fault. Using two nMOSs that have different size, two bridging faults that have different resistance values are injected in the CUT. And controlling a gate node, we experimented various fault effects. The proposed BICS detects the faulty current at the end of the clock period, therefore it can test a CUT that has a much longer critical propagation delay time and larger area than conventional BICSs. As expected in the HSPICE simulation, experimental results of fabricated chip demonstrated that the proposed BICS can exactly detect bridging faults in the circuit.

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Full mouth rehabilitation for a disabled patient: a case report (장애인 환자에서의 전악 수복 증례)

  • Kim, Ae-Ra;Vang, Mong-Sook;Park, Sang-Won;Lim, Hyun-Pil;Yun, Kwi-Dug;Yang, Hong-So
    • The Journal of Korean Academy of Prosthodontics
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    • v.51 no.3
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    • pp.208-213
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    • 2013
  • The spectrum of physically challenged patients who visit to a dental clinic for treatments are diverse: from ones of mild disabilities, who lead their lives in a similar way of ordinary people, to others who suffer from diseases that are difficult to be diagnosed, and need medical expertise due to systemic care or special techniques and instruments because of behavior management and difficulty of treatments. The patient in this case was 25-year-old autistic male patient who visited the clinic on account of overall treatment for multiple carious lesions. He could perform normal daily life to some degree under the care of a guardian. This case report describes predicaments of making a treatment plan resulted from lack of information about disabled patients, and difficulties of proceeding treatment procedures under general anesthesia. It is considered that sufficient consultation and history taking are needed before treatment for disabled patients.

Design of a Vehicle-Mounted GPS Antenna for Accurate Positioning (차량 정밀 측위용 이중대역 GPS 안테나 설계)

  • Pham, Nu;Chung, Jae-Young
    • The Journal of the Korea institute of electronic communication sciences
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    • v.11 no.2
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    • pp.145-150
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    • 2016
  • The capability of accurate positioning and tracking is necessary to implement an unmanned autonomous driving system. The moving-baseline GPS Technique is a promising candidate to mitigate positioning errors of conventional GPS system. It provides accurate positioning data based on the phase difference between received signals from multiple GPS antennas mounted on the same platform. In this paper, we propose a dual-band dual-circularly-polarized antenna suitable for the moving-baseline GPS. The proposed antenna operates at GPS L1 and L2 bands, and fed by the side of the antenna instead of the bottom. The antenna is firstly designed by calculating theoretical values of key parameters, and then optimized by means of 3D full-wave simulation software. Simulation and measurement results show that the optimized antenna offers 6.1% and 3.7% bandwidth at L1 and L2, respectively, with axial ratio bandwidth of more than 1%. The size of the antenna is $73mm{\times}73mm{\times}6.4mm$, which is small and low-profile.

H.264/AVC to MPEG-2 Video Transcoding by using Motion Vector Clustering (움직임벡터 군집화를 이용한 H.264/AVC에서 MPEG-2로의 비디오 트랜스코딩)

  • Shin, Yoon-Jeong;Son, Nam-Rye;Nguyen, Dinh Toan;Lee, Guee-Sang
    • The Journal of the Korea institute of electronic communication sciences
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    • v.5 no.1
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    • pp.23-30
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    • 2010
  • The H.264/AVC is increasingly used in broadcast video applications such as Internet Protocol television (IPTV), digital multimedia broadcasting (DMB) because of high compression performance. But the H.264/AVC coded video can be delivered to the widespread end-user equipment for MPEG-2 after transcoding between this video standards. This paper suggests a new transcoding algorithm for H.264/AVC to MPEG-2 transcoder that uses motion vector clustering in order to reduce the complexity without loss of video quality. The proposed method is exploiting the motion information gathered during h.264 decoding stage. To reduce the search space for the MPEG-2 motion estimation, the predictive motion vector is selected with a least distortion of the candidated motion vectors. These candidate motion vectors are considering the correlation of direction and distance of motion vectors of variable blocks in H.264/AVC. And then the best predictive motion vector is refined with full-search in ${\pm}2$ pixel search area. Compared with a cascaded decoder-encoder, the proposed transcoder achieves computational complexity savings up to 64% with a similar PSNR at the constant bitrate(CBR).