• Journal of IKEEE
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• v.18 no.1
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• pp.172-178
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• 2014

This paper describes the design technique and the method of analog front-end to measure the saturation of hemoglobin with oxygen sensor. To process the $SpO_2$ value from the sensor, the current data from the sensor should be converted into voltage domain. Designed analog front-end usually converts the current data from the sensor into voltage domain data to pass it on analog-to-digital converter called ADC with a different level of gain characteristics. This circuit was fabricated in a $0.11{\mu}m$ CMOS technology and has 4 level of gain properties. The occupied area is $0.174mm^2$.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.6
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• pp.28-36
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• 2008

This paper describes a low-power CMOS analog front-end block for UHF band RFID tag chips. It satisfies ISO/IEC 18000-6C and includes a memory block for test. For reducing power consumption, it operates with an internally generated power supply of 1V. An ASK demodulator using a current-mode schmitt trigger is proposed and designed. The proposed demodulator can more exactly demodulate than conventional demodulator with low current consumption. It is designed using a $0.18{\mu}m$ CMOS technology. Measurement results show that it can operate properly with an input as low as $0.25V_{peak}$ and consumes $2.63{\mu}A$. The chip size is $0.12mm^2$.

• Journal of Korea Society of Industrial Information Systems
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• v.21 no.1
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• pp.43-50
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• 2016

In this paper, new automatic LC calibrator is proposed for realizing a passive LC filter with almost constant frequency characteristic regardless of the PVT variations. The SAW-less GPS RX front-end is implemented using a 65nm CMOS process using the proposed LC calibrator. Also, new dual-mode low noise amplifier (LNA) structure is proposed to generate the RF signal required for the LC calibrator. The characteristics of the implemented GPS RX front-end show the voltage gain of about 42.5 dB, noise figure of below 1.35 dB, the blocker input P1dB of -24 dBm in case of the worst blocker signal at 1710 MHz frequency, while it consumes 7 mA current at 1.2 V power supply voltage.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.11
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• pp.130-137
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• 2013

This paper presents analog front-end(AFE) circuits for bio-potential measurement. The proposed AFE is composed of IA(instrument amplifier), BPF(band-pass filter), VGA(variable gain amplifier) and SAR(successive approximation register) type ADC. The low gm(LGM) circuits with current division technique and Miller capacitance with high gain amplifier enable IA to implement on-chip AC-coupling without external passive components. Spilt capacitor array with capacitor division technique and asynchronous control make the 12-b ADC with low power consumption and small die area. The total current consumption of proposed AFE is 6.3uA at 1.8V.

• Corrosion Science and Technology
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• v.19 no.4
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• pp.189-195
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• 2020

Two air vents situated on a heat transport pipe in district heating system were exposed to the same environment for 10 years. However, one air vent was more corroded than the other. It also had a hole on the top of the front-end pipe. Comparative analysis was performed for these air vents to identify the cause of corrosion and establish countermeasures. Through experimental observation of the damaged part and analyses of powders sampled from air vents, it was found that corrosion was initiated at the top of the front-end pipe. It then spread to the bottom. Energy dispersive X-ray spectroscopy results showed that potassium and chlorine were measured from the corroded product in the damaged air vent derived from rainwater and insulation, respectively. The temperature of the damaged air vent was maintained at 75 ~ 120 ℃ by heating water. Rainwater-soaked insulation around the front-end pipe had been hydrolyzed. Therefore, the damaged air vent was exposed to an environment in which corrosion under insulation could be facilitated. In addition, ion chromatography and inductively coupled plasma measurements indicated that the matrix of the damaged front-end pipe contained a higher manganese content which might have promoted corrosion under insulation.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.12
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• pp.2834-2851
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• 1997

In this paper, a design and implementation of VHDL compiler front-end, aims at supporting the full-set of VHDL '87 & '93 LRM and carring out the preprocessing of VHDL-to-C, is described. The VHDL compiler front-end includes 1)the symbol tree of analyzed data to represent the hierarchy, the scope and visibility, the overloading and homograph, the concurrent multiple stacks in VHDL, 2)the data structure and supportig routies to deal with the objects, the type and subtype, the attribute and operation in VHDL, 3)the analysis of the concurrent/sequential statements, the behavior/structural descriptions, of semantic token and the propagation of symbol & type to improve the registration and retrieval procedure of analyzed data. In the experiments with Validation Suite, the VHDL compiler front-end could support the full-set specification of VHDL LRM '87 & '93; and in the experiments to asses the performance of symantic token for the VHDL hierachy/visibility/concurrency/semantic checking, the improvement of about 20-30% could be achieved.

• Journal of KIISE:Computing Practices and Letters
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• v.6 no.1
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• pp.11-20
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• 2000

Many object query languages including OQL(the query language proposed by theOBMG) allow query block to be nested in any clause: select clause, from clause and where clause. The processing of nested queries can affect the performance of its query processor Therefore, an OQL query processor should have effective optimizing techniques for nested queries. This paper designs and implements a new framework of an unnesting front-end for an OQL query processor This unnesting module can minimize implementation overhead when developing a new OQL processor or extending an existing query processor to be equipped with an unnesting facility This is accomplished by separation between logical algebra operators used in an unnesting front-end and ones in a query optimizer.

• BioChip Journal
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• v.12 no.4
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• pp.332-339
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• 2018

The future neuro-prosthetic devices would be required spikes data monitoring through sub-nanoscale transistors that enables to neuroscientists and clinicals for scalable, wireless and implantable applications. This research investigates the spikes monitoring through integrated CNT front-end amplifier for neuro-prosthetic diagnosis. The proposed carbon nanotube-based architecture consists of front-end amplifier (FEA), integrate fire neuron and pseudo resistor technique that observed high electrical performance through neural activity. A pseudo resistor technique ensures large input impedance for integrated FEA by compensating the input leakage current. While carbon nanotube based FEA provides low-voltage operation with directly impacts on the power consumption and also give detector size that demonstrates fidelity of the neural signals. The observed neural activity shows amplitude of spiking in terms of action potential up to $80{\mu}V$ while local field potentials up to 40 mV by using proposed architecture. This fully integrated architecture is implemented in Analog cadence virtuoso using design kit of CNT process. The fabricated chip consumes less power consumption of $2{\mu}W$ under the supply voltage of 0.7 V. The experimental and simulated results of the integrated FEA achieves $60G{\Omega}$ of input impedance and input referred noise of $8.5nv/{\sqrt{Hz}}$ over the wide bandwidth. Moreover, measured gain of the amplifier achieves 75 dB midband from range of 1 KHz to 35 KHz. The proposed research provides refreshing neural recording data through nanotube integrated circuit and which could be beneficial for the next generation neuroscientists.

• International journal of advanced smart convergence
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• v.10 no.3
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• pp.81-88
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• 2021

This paper proposes two types of subharmonic RF receiver front-end (called LMV) where, in a single stage, quadrature voltage-controlled oscillator (QVCO) is stacked on top of a low noise amplifier. Since the QVCO itself plays the role of the single-balanced subharmonic mixer with the dc current reuse technique by stacking, the proposed topology can remove the RF mixer component in the RF front-end and thus reduce the chip size and the power consumption. Another advantage of the proposed topologies is that many challenges of the direct conversion receiver can be easily evaded with the subharmonic mixing in the QVCO itself. The intermediate frequency signal can be directly extracted at the center taps of the two inductors of the QVCO. Using a 65 nm complementary metal oxide semiconductor (CMOS) technology, the proposed subharmonic RF front-ends are designed. Oscillating at around 2.4 GHz band, the proposed subharmonic LMVs are compared in terms of phase noise, voltage conversion gain and double sideband noise figure. The subharmonic LMVs consume about 330 ㎼ dc power from a 1-V supply.

• Proceedings of the KSRS Conference
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• 2004.10a
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• pp.355-357
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• 2004

With the introduction to ebXML and web service related standards, enterprises struggle to adapt to the rapidly evolving technology to meet the complex needs of the enterprise customer. The ability to integrate and interoperate individual services within enterprise and with other enterprise's information technology infrastructure using standard-based business processes is an important element of business process management system. For over 25 years EDI has established VAN based solution of exchanging business information in electronic form. However EDI solutions are only accessible to large organizations due to the cost factor. Moreover lack of well accepted B2B business process standards is hindering the success of promoting interoperability between organizations of any size. ebXML work is focused on defining the standard B2B business process context and its runtime semantics in order to remove these hindrances. However ebXML framework does not recommend any particular implementation model to interact with enterprise internal system. This paper propose a end to end business process management architecture by applying ebXML in the front end of the enterprise system and using BPEL to integrate front end services into related services within enterprise.