• Proceedings of the KIEE Conference
• /
• 1987.07b
• /
• pp.1243-1246
• /
• 1987

To characterize the biological tissues, the new methods to measure the frequency dependent attenuation are presented in this paper. In general, ultrasonic phase information was assumed by linear function of the frequency. But, the minimum phase function which characterizes the frequency dispersion of tissue was derived in [l]. It is very significant to measure the attenuation by using the minimum phase function to characterize the frequency dispersion of tissue. Therefore, a more efficient method measuring the frequency dependent attenuation are proposed by using the estimated sound velocity and polarity of reflected signal. To verify the algorithms, pulse reflection experiments are performed.

• 한국지구물리탐사학회:학술대회논문집
• /
• 2003.11a
• /
• pp.459-463
• /
• 2003

Waveform inversion requires extracting a reliable low frequency content of seismic data for estimating of the low wave number velocity model. The low frequency content of the seismic data is usually discarded or neglected because of the band-limited response of the source and the receivers. In this study, however small the spectral of the low frequency seismic data is, we assume that it is possible to extract a reliable phase information of the low frequency from the seismic data and use it in waveform inversion. To this end, we exploit the frequency domain finite element modeling and source-receiver reciprocity to calculate the $Frech\`{e}t$ derivative of the phase of the seismic data with respect to the earth model parameter such as velocity, and then apply a damped least squares method to invert the phase of the seismic data. Through numerical example, we will attempt to demonstrate the feasibility of our method in estimating the correct velocity model for prestack depth migration.

• Journal of Power Electronics
• /
• v.14 no.3
• /
• pp.598-607
• /
• 2014

This paper proposes a frequency-locked loop (FLL) scheme for a single-phase grid-connected converter. A second-order generalized integrator (SOGI) based on fuzzy logic (FL) is applied to this converter to achieve precise phase angle detection. The use of this method enables the compensation of the nonlinear characteristic of the frequency error, which is defined in the SOGI scheme as the variation of the central frequency through the self-tuning gain. With the proposed scheme, the performance of the SOGI-FLL is further improved at the grid disturbances, which results in the stable operation of the grid converter under grid voltage sags or frequency variation. The PSIM simulation and experimental results are shown to verify the effectiveness of the proposed method.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.67 no.11
• /
• pp.1447-1454
• /
• 2018

In this paper, the design of robust DSC-PLL(Delayed Signal Cancellation Phase Locked Loop) is proposed for coping with frequency variation. This method shows significant performance for detection of fundamental positive sequence component voltage when the grid voltage is polluted by grid unbalance and frequency variation. The feedback frequency estimation of DSC-PLL is tracking the drift in the phase by unbalance and frequency variation. The robust DSC PLL is to present the analysis on method and performance under frequency variations. These compensation algorithms can correct for discrepancies of changing the frequency within maximum 193[ms] and improve traditional DSC-PLL. Linear interpolation method is adopted to reduce the discretized errors in the digital implementation of the PLL. For verification of robust characteristic, PLL methods are implemented on FPGA with a discrete fixed point based. The proposed method is validated by both Matlab/Simulink and experimental results based on FPGA(XC7Z030).

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.56 no.6
• /
• pp.1071-1079
• /
• 2007

In this paper, a novel space vector control method for isolated multi-level inverter using 3-phase low frequency transformers is proposed. This method is based on the simplification of the space-vector diagram of a five-level inverter using calculated table into fully programming method. The execution time of the proposed method is about same as that of the method using calculated table. Also, the proposed method is easily applied to other case level inverter. We applied this method into the 3-phase IHCML inverter using common arm. It makes possible to use a single DC power source due to employing low frequency transformers. In this inverter, the number of transformers could be reduced compare with an exiting 3-phase multi-level inverter using single phase transformer. In addition, this method generates very low harmonic distortion operation with nearly fundamental switching frequency. Finally, We tested multi-level inverter to clarify electric circuit and reasonableness through Matlab simulation and experiment by using prototype inverter.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.13 no.6
• /
• pp.12-15
• /
• 1976

This paper presents the realization method of 90$^{\circ}$ constant phase shifter in the VHF band, constructed by the entirely differens idea from the conventional method of the realization of constant phase shifter in the audio frequency range. The construction of 90$^{\circ}$ constant phase shifter is. simple and can be easily realized by using the distributed constant element, transmission line, and the lumped constant elements, R,C,L.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.14 no.4
• /
• pp.338-347
• /
• 1989

In this paper, the digital frequency synthesizer with the clock ccunting method is designed and implemented to increase the performace of the digital frequency synthesizer with pahse accumulating method which was developed before. Unlike an phase accumulating method, clock countind method is supplied a continually changeable clock frequency with PLL(Phase Locked Loop) and allocated a fixed phase step with N-ary counter. Form the experimenta results, it is confirmed that any periodic distorition phenomena are disappeared, and truncation harmonics are more reduced. But the output bandwidths are decreased in inverse proportion to the counter counting number and the circuits are somewhat complex than phase accumulating method.

• Journal of Power Electronics
• /
• v.16 no.4
• /
• pp.1513-1525
• /
• 2016

Rapid and accurate phase synchronization is critical for the reliable control of grid-tied inverters. However, the commonly used software phase-locked loop methods do not always satisfy the need for high-speed and accurate phase synchronization under severe grid imbalance conditions. To address this problem, this study develops a novel open-loop phase locking scheme based on a synchronous reference frame. The proposed scheme is characterized by remarkable response speed, high accuracy, and easy implementation. It comprises three functional cascaded blocks: fast orthogonal signal generation block, fast fundamental-frequency positive sequence component construction block, and fast phase calculation block. The developed virtual orthogonal signal generation method in the first block, which is characterized by noise immunity and high accuracy, can effectively avoid approximation errors and noise amplification in a wide range of sampling frequencies. In the second block, which is the foundation for achieving fast phase synchronization within 3 ms, the fundamental-frequency positive sequence components of unsymmetrical grid voltages can be achieved with the developed orthogonal signal construction strategy and the symmetrical component method. The real-time grid phase can be consequently obtained in the third block, which is free from self-tuning closed-loop control and thus improves the dynamic performance of the proposed scheme. The proposed scheme is adaptive to severe unsymmetrical grid voltages with sudden changes in magnitude, phase, and/or frequency. Moreover, this scheme is able to eliminate phase errors induced by harmonics and random noise. The validity and utility of the proposed scheme are verified by the experimental results.

• Journal of Power Electronics
• /
• v.17 no.1
• /
• pp.106-114
• /
• 2017

In this paper, the Selective Harmonic Mitigation-PWM (SHM-PWM) method is used in single-phase and three-phase Cascaded H-Bridge (CHB) inverters in order to fulfill different power quality standards such as EN 50160, CIGRE WG 36-05, IEC 61000-3-6 and IEC 61000-2-12. Non-equal DC link voltages are used to increase the degrees of freedom for the proposed SHM-PWM technique. In addition, it will be shown that the obtained solutions become continuous and without sudden changes. As a result, the look-up tables can be significantly reduced. The proposed three-phase modulation method can mitigate up to the 50th harmonic from the output voltage, while each switch has just one switching in a fundamental period. In other words, the switching frequency of the power switches are limited to 50 Hz, which is the lowest switching frequency that can be achieved in the multilevel converters, when the optimal selective harmonic mitigation method is employed. In single-phase mode, the proposed method can successfully mitigate harmonics up to the 50th, where the switching frequency is 150 Hz. Finally, the validity of the proposed method is verified by simulations and experiments on a 9-level CHB inverter.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.4 no.3
• /
• pp.285-293
• /
• 1999

In this paper, the novel digital frequency/phase controller, to control the invelter fed traveling wave type ultra-sonic m motor(USM) is proposed. This controller is used to control the drive frequency, phase difference and applied voltages of e each phase of the motor. Proposed digital controller has constructed with digital logic only, no more use digitallongleftarrowanalog h hybrid method of the conventional controller, in order to generate drive frequency and phase difference. Therefore, the c control system has become to velY simple structure. T\rvo types of controllers are designed, one is to control drive f frequency and phase difference, another has added voltage control function of each phase. Two full digital voltage/phase c controllers are implemented by using custom LSI and EPLD, the control pelformance and the simplicity ofthe proposed c controller is verified by expeJimental results.