• Journal of Korea Multimedia Society
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• v.14 no.5
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• pp.614-621
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• 2011

This paper presents design of a wide tuning range digitally controlled oscillator(DCO) for Mobile-DTV applications. DCO is the key element of the ADPLL block that generates oscillation frequencies. We proposed a binary delay chain(BDC) structure, for wide tuning range DCO, modifying conventional fixed delay chain. The proposed structure generates oscillation frequencies by delay cell combination which has a variable delay time of $2^i$ in the range of $0{\leq}i{\leq}n-1$. The BOC structure can reduce the number of delay cells because it make possible to select delay cell and resolution. We simulated the proposed DCO by Cadence's Spectre RF tool in 1.8V chartered $0.18{\mu}m$ CMOS process. The simulation results showed 77MHz~2.07GHz frequency range and 3ps resolution. The phase noise yields -101dBc/Hz@1MHz at Mobile-DTV maximum frequency 1675MHz and the power consumption is 5.87mW. The proposed DCO satisfies Mobile-DTV standards such as ATSC-M/H, DVB-H, ISDB-T, T-DMB.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.3 s.333
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• pp.25-32
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• 2005

In this papers, we first, therefore, designed VCO(voltage controlled oscillator) that is composed of the dielectric resonator and the varactor diode, and then designed and fabricated PLDRO(phase locked dielectric resonator oscillator) that is combined with the sampling phase detector and loop filter. The measured results of the fabricated PLDRO at 12.05 [GHz] show the output power is 13.54 [dBm], frequency tuning range approximately +/- 7.5 [MHz], and Power variation over the tuning range less than 0.2 [dB], respectively. The phase noise which effects on bits error rate in digital communication is obtained with -114.5 [dBc/Hz] at 100 [KHz] offset from carrier, and The second harmonic suppression is less than -41.49 [dBc]. These measured results are found to be more improved than those of VCO without adopting PLL, and the phase noise and power variation performance characteristics show the better performances than those of conventional PLL.

• Proceedings of the Korea Association of Crystal Growth Conference
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• 1996.06a
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• pp.508-508
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• 1996

;The growth of films have considerable interest in the field of superlattice structured multi-layer epitaxy led to realization of new devices concepts. Molecular beam epitaxy (MBE) with in situ observation by reflection high-energy electron diffraction (RHEED) is a key technology for controlled layered growth on the atomic scale in oxide crystal thin films. Also, the combination of radical oxygen source and MBE will certainly accelerate the progress of applications of oxides. In this study, the growth process of single crystal films using by MBE method is discussed taking the oxide materials of Bi-Sr-Ca-Cu family. Oxidation was provided by a flux density of activated oxygen (oxygen radicals) from an rf-excited discharge. Generation of oxygen radicals is obtained in a specially designed radical sources with different types (coil and electrode types). Molecular oxygen was introduced into a quartz tube through a variable leak valve with mass flowmeter. Corresponding to the oxygen flow rate, the pressure of the system ranged from $1{\;}{\times}{\;}10^{-6}{\;}Torr{\;}to{\;}5{\;}{\times}{\;}10^{-5}$ Torr. The base pressure was $1{\;}{\times}{\;}10^{-10}$ Torr. The growth of Bi-oxides was achieved by coevaporation of metal elements and oxygen. In this way a Bi-oxide multilayer structure was prepared on a basal-plane MgO or $SrTiO_3$ substrate. The grown films compiled using RHEED patterns during and after the growth. Futher, the exact observation of oxygen radicals with MBE is an important technology for a approach of growth conditions on stoichiometry and perfection on the atomic scale in oxide. The oxidization degree, which is determined and controlled by the number of activated oxygen when using radical sources of two types, are utilized by voltage locked loop (VLL) method. Coil type is suitable for oxygen radical source than electrode type. The relationship between the flux of oxygen radical and the rf power or oxygen partial pressure estimated. The flux of radicals increases as the rf power increases, and indicates to the frequency change having the the value of about $2{\times}10^{14}{\;}atoms{\;}{\cdots}{\;}cm^{-2}{\;}{\cdots}{\;}S^{-I}$ when the oxygen flow rate of 2.0 seem and rf power 150 W.150 W.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.4
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• pp.1100-1112
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• 1998

In this paper, a novel method of minimizing the phase error is proposed. A DP-PLL system using this method is implemented and its performacnce is investigated, too. The DP-PLL system detects the phase error between reference clock and locally generated system clock. The phase difference is then reported as a PEV(Phase Error Variation), which is propoced from the delayted n-tap rising dege clock circuit with 5ns resolution in the phase detector. The algorithm is used to track the optimal DAC coefficients, which are adjusted from sample to sample in such a way as to minimize the PEV. The proposed method is found to have remarkable good potential for fast and accurate phase error tracking characteristic. The algorithm shows good performance to supress the low frequency jitter.-ending points, we design new basis functions based on the Legendre polynomial and then transform the error signals with them. When applied to synthetic images such as circles, ellipses and etc., the proposed method provides, in overall, outstanding results in respect to the transform coding gain compared with DCT and DST. And in the case when applied to natural images, the proposed method gives better image quality over DCT and comparable results with DST.

• Journal of Power Electronics
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• v.19 no.5
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• pp.1224-1234
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• 2019

Hybrid rotor position estimation methods that integrate a fundamental model and high frequency (HF) signal injection are widely used for the wide speed-range sensorless control of interior permanent-magnet synchronous machines (IPMSMs). However, the direct transition of two different schemes may lead to system fluctuations or system instability since two estimated rotor positions based on two different schemes are always unequal due to the effects of parameter variations, system delays and inverter nonlinearities. In order to avoid these problems, a seamless transition strategy to define and construct a virtual q-axis inductance is proposed in this paper. With the proposed seamless transition strategy, an estimated rotor position based on a fundamental model is forced to track that based on HF signal injection before the transition by adjusting the constructed virtual q-axis inductance. Meanwhile, considering that the virtual q-axis inductance changes with rotor position estimation errors, a new observer with a two-phase phase-locked loop (TP-PLL) is developed to accurately obtain the virtual q-axis inductance online. Furthermore, IPMSM sensorless control with maximum torque per ampere (MTPA) operations can be tracked automatically by selecting the proper virtual q-axis inductance. Finally, experimental results obtained from an IPMSM demonstrate the feasibility of the proposed seamless transition strategy.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.4
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• pp.39-50
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• 2011

In this paper, we presents a CDR circuit for $2^{nd}$-generation AiPi+, one of the Intra-panel Interface. The speed of the proposed clock and data recovery is increased to 1.25 Gbps compared with that of AiPi+. The DLL-based CDR architecture is used to generate the multi-phase clocks. We propose the simple scheme for frequency detector (FD) to mitigate the harmonic-locking and reduce the complexity. In addition, the duty cycle corrector that limits the maximum pulse width is used to avoid the problem of missing clock edges due to the mismatch between rising and falling time of VCDL's delay cells. The proposed CDR is implemented in 0.18 um technology with the supply voltage of 1.8 V. The active die area is $660\;{\mu}m\;{\times}\;250\;{\mu}m$, and supply voltage is 1.8 V. Peak-to-Peak jitter is less than 15 ps and the power consumption of the CDR except input buffer, equalizer, and de-serializer is 5.94 mW.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.2
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• pp.7-13
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• 2011

This paper presents a Time-to-Digital Converter which is a key block of an All-Digital Phase Locked Loop. In this work, a Vernier Delay Line is added in a conventional Gated Ring Oscillator, so it could get multi-phases and a high resolution. The Gated Ring Oscillator uses 7 unit delay cell, the Vernier Delay Line is used each delay cell. So proposed Time-to-Digital Converter uses total 21 phases. This Time-to-Digital Converter circuit is designed and laid out in $0.13{\mu}m$ 1P-6M CMOS technology. The proposed Time-to-Digital Converter achieves 26ps resolution, maximum input signal frequency is 100MHz and the digital output of proposed Time-to-Digital Converter are 8-bits. The proposed TDC detect 5ns phase difference between Start and Stop signal. A power consumption is 8.4~12.7mW depending on Enable signal width.

• Journal of Korea Water Resources Association
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• v.48 no.8
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• pp.613-623
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• 2015

To overcome the difficulties of discharge measurements during flood season, MWSCM(micowave water surface current meter) which measures river surface velocities without contacting water has been applied in field work since its development. The existing version of MWSCM is for floods so that its applicability is low due to the short periods of floods. Therefore the renovative redesign of MWSCM to increase the applicability was conducted so that it can be applied to the discharge measurements during normal flows as well as flood ones by extending the measurable range of velocity. A newly developed high-performance MWSCM for general use can measure the velocity range of 0.03-20.0 m/s from flood flows to normal flows, whereas MWSCM for floods can measure the velocity range of 0.5-10.0 m/s. The improvement of antenna isolation between transmitter and receiver to block the inflow of transmitted singals to receiver and the improvement of phase noise of oscillator are necessary for detecting low velocity with MWSCM technology. Separate type antenna of transmitting and receiving signals is developed for isolation enhancement and phase locked loop synthesizer as an oscillator is applied to high-performance MWSCM for general use. Microwave frequency of 24 GHz is applied to the new MWSCM rather than 10 GHz to make the new MWSCM small and light for convenient use of it at fields. Improvement requests on MWSCM for floods-stable velocity measurement, self test, low power consumtion, and waterproof and dampproof-from the users of it has been reflected on the development of the new version of MWSCM.