• Title/Summary/Keyword: frequency scaling

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A layer-wise frequency scaling for a neural processing unit

  • Chung, Jaehoon;Kim, HyunMi;Shin, Kyoungseon;Lyuh, Chun-Gi;Cho, Yong Cheol Peter;Han, Jinho;Kwon, Youngsu;Gong, Young-Ho;Chung, Sung Woo
    • ETRI Journal
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    • v.44 no.5
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    • pp.849-858
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    • 2022
  • Dynamic voltage frequency scaling (DVFS) has been widely adopted for runtime power management of various processing units. In the case of neural processing units (NPUs), power management of neural network applications is required to adjust the frequency and voltage every layer to consider the power behavior and performance of each layer. Unfortunately, DVFS is inappropriate for layer-wise run-time power management of NPUs due to the long latency of voltage scaling compared with each layer execution time. Because the frequency scaling is fast enough to keep up with each layer, we propose a layerwise dynamic frequency scaling (DFS) technique for an NPU. Our proposed DFS exploits the highest frequency under the power limit of an NPU for each layer. To determine the highest allowable frequency, we build a power model to predict the power consumption of an NPU based on a real measurement on the fabricated NPU. Our evaluation results show that our proposed DFS improves frame per second (FPS) by 33% and saves energy by 14% on average, compared with DVFS.

Limiting CPU Frequency Scaling Considering Main Memory Accesses (주메모리 접근을 고려한 CPU 주파수 조정 제한)

  • Park, Moonju
    • KIISE Transactions on Computing Practices
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    • v.20 no.9
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    • pp.483-491
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    • 2014
  • Contemporary computer systems exploits DVFS (Dynamic Voltage/Frequency Scaling) technology for balancing performance and power consumption. The efficiency of DVFS depends on how much performance we get for larger power consumption due to elevated CPU frequency. Especially for memory-bounded applications, higher CPU frequency often does not result in higher performance. In this paper, we present an upper bound of CPU frequency scaling based on memory accesses. It is observed that the performance gain due to higher CPU frequency is limited by memory accesses (last level cache misses) per instructions by experiments. Using the results, we present the CPU frequency upper bound with little performance gain. Experimental results show that for a memory-bounded application, applying the frequency upper bound enhances the energy efficiency of the application by above 30%.

Design of Low Power System using Dynamic Scaling (Dynamic Scaling을 이용한 저전력 시스템의 설계)

  • Kim, Do-Hun;Kim, Yang-Mo;Kim, Seung-Ho;Lee, Nam Ho
    • Proceedings of the KIEE Conference
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    • 2002.11c
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    • pp.282-285
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    • 2002
  • In this paper, we designed of low power system by using dynamic scaling. As an effective low-power design, dynamic voltage/frequency scaling recently has received a lot of attention. In dynamic frequency scheme, all execution cycles are driven by the clock frequency that switched frequency dynamically at run time. The algorithm schedules lower frequency operators at earlier steps and higher frequency operators to later steps. This algorithm assigned the frequency for each execution cycle then it adjusted the voltage associated with the frequency.

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Dynamic Power Management using Dynamic Frequency Scaling in Embedded System (임베디드 시스템에서 DFS 기법을 이용한 동적 전력 관리)

  • Kwon, Ki-Hyeon;Kim, Nam-Yong;Byun, Hyung-Gi
    • Journal of Digital Contents Society
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    • v.10 no.2
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    • pp.217-223
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    • 2009
  • In order to decrease the power consumption in Embedded Linux environment based on XScale PXA255, We produce the device driver of DFS(Dynamic Frequency Scaling) technique, design and implement the middleware DFM(Dynamic Frequency Management) to scale the power of embedded target board with porting this device drive, suggest the method to reduce the Embedded system's power consumption.

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A new Robust Wavelet Shift Keying System Using Scaling and Wavelet Functions (스케일링 함수와 웨이브릿을 이용한 잡음에 강인한 새로운 웨이브릿 편이 변조 시스템)

  • Jeong, Tae-Il
    • Journal of the Institute of Convergence Signal Processing
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    • v.9 no.2
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    • pp.98-103
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    • 2008
  • There are the frequency shift keying(FSK), phase shift keying(PSK) and amplitude shift keying(ASK) in the conventional digital communications method. In this paper, We proposed a new robust wavelet shift keying system using scaling and wavelet function in the digital communication. Wavelet Transform consist of a low frequency and high frequency coefficient. When the input signal is one, if it finds the impulse response, the signal is separated from the scaling and wavelet function. The binary data is encoded by modulator which assigned the scaling function to 1(one), and wavelet to zero(0). It was demonstrated by experiment that the proposed algorithm can be a robust noise.

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Awareness and satisfaction toward health insurance coverage of scaling (스켈링 건강보험 서비스에 대한 인식 및 만족도)

  • Jung, Jae-Yeon;Lim, Mi-Hee
    • Journal of Korean society of Dental Hygiene
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    • v.15 no.6
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    • pp.1107-1116
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    • 2015
  • Objectives: The purpose of this study was to examine awareness and satisfaction toward health insurance coverage of scaling. Methods: A self-reported questionnaire was completed by 221 patients receiving scaling service from July to August, 2014. The informed consent was approved after the explanation of purpose of the study. The questionnaire consisted of general characteristics of the subjects, awareness toward health insurance coverage of scaling, scaling service covered by health insurance, and satisfaction with health insurance service. Results: Those recognizing the health insurance service extension accounted for 87.3 percent and 67.4 percent answered that the appropriate coverage age would be 20 years old. The recommendable frequency of scaling was once a year and this accounted for 49.3 percent. Fifty percent of the subjects thought health insurance coverage of scaling would be reasonable and 34.8 percent acquired the information from mass media. The most common service providers were dental hygienists and the length of service was from 20 to 30 minutes. The contents of service included scaling service, toothbrushing method, and oral care. The satisfaction was 4.39 points. Conclusions: The health insurance coverage of scaling will improve the oral health and quality of life in Korean adults. So the government should try to extend the scaling coverage by health insurance and the frequency of scaling.

Tethered DNA shear dynamics in the flow gradient plane: application to double tethering

  • Lueth, Christopher A.;Shaqfeh, Eric S.G.
    • Korea-Australia Rheology Journal
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    • v.19 no.3
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    • pp.141-146
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    • 2007
  • We examine the wall contact of a $3\;{\mu}m$ tethered DNA chain's free end under shear with a focus on developing schemes for double-tethering in the application of making scaffolds for molecular wires. At this scale our results are found to be highly dependent on small length scale rigidity. Chain-end-wall contact frequency, mean fractional extension deficit upon contact, and standard deviation in extension upon contact are examined for scaling with dimensionless flow strength, Wi. Predictions made using a one dimensional approximation to the Smoluchowski equation for a dumbbell and three dimensional dumbbell simulations produce extension deficit, standard deviation, and frequency scaling exponents of -1/3, -1/3, and 2/3, respectively whereas more fine-grained Kratky-Porod (KP) simulations produce scaling exponents of -0.48, -0.42, and 0.76. The contact frequency scaling of 2/3 is derived from the known results regarding cyclic dynamics Analytical scaling predictions are in agreement with those previously proposed for ${\lambda}-DNA$. [Ladoux and Doyle, 2000, Doyle et al., 2000]. Our results suggest that the differences between the dumbbell and the KP model are associated with the addition of chain discretization and the correct bending potential in the latter. These scaling results will aide future exploration in double tethering of DNA to a surface.

Selecting and scaling ground motion time histories according to Eurocode 8 and ASCE 7-05

  • Ergun, Mustafa;Ates, Sevket
    • Earthquakes and Structures
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    • v.5 no.2
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    • pp.129-142
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    • 2013
  • Linear and nonlinear time history analyses have been becoming more common in seismic analysis and design of structures with advances in computer technology and earthquake engineering. One of the most important issues for such analyses is the selection of appropriate acceleration time histories and matching these histories to a code design acceleration spectrum. In literature, there are three sources of acceleration time histories: artificial records, synthetic records obtained from seismological models and accelerograms recorded in real earthquakes. Because of the increase of the number of strong ground motion database, using and scaling real earthquake records for seismic analysis has been becoming one of the most popular research issues in earthquake engineering. In general, two methods are used for scaling actual earthquake records: scaling in time domain and frequency domain. The objective of this study is twofold: the first is to discuss and summarize basic methodologies and criteria for selecting and scaling ground motion time histories. The second is to analyze scaling results of time domain method according to ASCE 7-05 and Eurocode 8 (1998-1:2004) criteria. Differences between time domain method and frequency domain method are mentioned briefly. The time domain scaling procedure is utilized to scale the available real records obtained from near fault motions and far fault motions to match the proposed elastic design acceleration spectrum given in the Eurocode 8. Why the time domain method is preferred in this study is stated. The best fitted ground motion time histories are selected and these histories are analyzed according to Eurocode 8 (1998-1:2004) and ASCE 7-05 criteria. Also, characteristics of both near fault ground motions and far fault ground motions are presented by the help of figures. Hence, we can compare the effects of near fault ground motions on structures with far fault ground motions' effects.

Depth Scaling Strategy Using a Flexible Damping Factor forFrequency-Domain Elastic Full Waveform Inversion

  • Oh, Ju-Won;Kim, Shin-Woong;Min, Dong-Joo;Moon, Seok-Joon;Hwang, Jong-Ha
    • Journal of the Korean earth science society
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    • v.37 no.5
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    • pp.277-285
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    • 2016
  • We introduce a depth scaling strategy to improve the accuracy of frequency-domain elastic full waveform inversion (FWI) using the new pseudo-Hessian matrix for seismic data without low-frequency components. The depth scaling strategy is based on the fact that the damping factor in the Levenberg-Marquardt method controls the energy concentration in the gradient. In other words, a large damping factor makes the Levenberg-Marquardt method similar to the steepest-descent method, by which shallow structures are mainly recovered. With a small damping factor, the Levenberg-Marquardt method becomes similar to the Gauss-Newton methods by which we can resolve deep structures as well as shallow structures. In our depth scaling strategy, a large damping factor is used in the early stage and then decreases automatically with the trend of error as the iteration goes on. With the depth scaling strategy, we can gradually move the parameter-searching region from shallow to deep parts. This flexible damping factor plays a role in retarding the model parameter update for shallow parts and mainly inverting deeper parts in the later stage of inversion. By doing so, we can improve deep parts in inversion results. The depth scaling strategy is applied to synthetic data without lowfrequency components for a modified version of the SEG/EAGE overthrust model. Numerical examples show that the flexible damping factor yields better results than the constant damping factor when reliable low-frequency components are missing.

Dynamic Voltage and Frequency Scaling for Power-Constrained Design using Process Voltage and Temperature Sensor Circuits

  • Nan, Haiqing;Kim, Kyung-Ki;Wang, Wei;Choi, Ken
    • Journal of Information Processing Systems
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    • v.7 no.1
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    • pp.93-102
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    • 2011
  • In deeply scaled CMOS technologies, two major non-ideal factors are threatening the survival of the CMOS; i) PVT (process, voltage, and temperature) variations and ii) leakage power consumption. In this paper, we propose a novel post-silicon tuning methodology to scale optimum voltage and frequency "dynamically". The proposed design technique will use our PVT sensor circuits to monitor the variations and based on the monitored variation data, voltage and frequency will be compensated "automatically". During the compensation process, supply voltage is dynamically adjusted to guarantee the minimum total power consumption without violating the frequency requirement. The simulation results show that the proposed technique can reduce the total power by 85% and the static power by 53% on average for the selected ISCAS'85 benchmark circuits with 45 nm CMOS technology compared to the results of the traditional PVT compensation method.