• Title/Summary/Keyword: flux-gate

검색결과 51건 처리시간 0.039초

2-체널 링-코어 프럭스-게이트 콤파스의 성능평가 시스템 개발 (Performance Evaluation System for Tow-Channel Ring-Core Flux-Gate Compass)

  • 임정빈;정중식;박성현;김봉석
    • 한국항해항만학회지
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    • 제26권5호
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    • pp.529-535
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    • 2002
  • 2-체널 링-코어 프럭스-게이트 콤파스(Two-Channel Ring-Core Flux-Gate Compass; TCRC FG-Compass)의 성능평가 시스템 설계와 구현방법 및, 다항회귀 모형 기반의 평가 절차와 방법을 기술했다. 성능평가 시스템은 스템모터 구동 유닛과, 방위정보 전송 유닛, 다항회귀식에 의한 평가 프로그램 등으로 구성하였다. 성능평가 실험결과, TCRC FG-Compass는 잔차가 $2^{\circ}$인 반면, 기존의 FG-Compass는 잔차가 $4^{\circ}$임을 나타냈다. 따라서 성능이 향상된 새로운 FG-Compass 설계가 가능함을 확인하였다. 또한, 자동으로 잔차를 추정하고 보정할 수 있는 설계론에 관해서도 논의하였다.

피드백형 플럭스게이트 마그네토미터 제작 (Construction of Feed-back Type Flux-gate Magnetometer)

  • 손대락
    • 한국자기학회지
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    • 제22권2호
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    • pp.45-48
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    • 2012
  • Co계 비정질 리본인 Metglass$^{(R)}$2714A 코어를 사용하여, 자기장 측정 범위가 ${\pm}100\;{\mu}T$, 측정 주파수 범위가 dc~10 Hz인 3-축의 피드백형 플럭스게이트 마그네토미터를 제작하였다. 제작된 마그네토미터의 아날로그 출력의 전기잡음은 5 pT/$\sqrt{Hz}$ at 1 Hz 이었으며, Micro-controller와 24 bit ADC(Analog to Digital Converter)를 사용한 마그네토미터의 출력을 0.1 nT의 분해능으로 디지털로 출력 할 수 있게 하였다. 디지털 신호로 출력되는 마그네토미터의 선형도는 $1{\times}10^{-4}$ 이하였으며, 1시간 동안 영점 변화는 0.2 nT 이하였다.

Optically Controlled Silicon MESFET Modeling Considering Diffusion Process

  • Chattopadhyay, S.N.;Motoyama, N.;Rudra, A.;Sharma, A.;Sriram, S.;Overton, C.B.;Pandey, P.
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제7권3호
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    • pp.196-208
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    • 2007
  • An analytical model is proposed for an optically controlled Metal Semiconductor Field Effect Transistor (MESFET), known as Optical Field Effect Transistor (OPFET) considering the diffusion fabrication process. The electrical parameters such as threshold voltage, drain-source current, gate capacitances and switching response have been determined for the dark and various illuminated conditions. The Photovoltaic effect due to photogenerated carriers under illumination is shown to modulate the channel cross-section, which in turn significantly changes the threshold voltage, drainsource current, the gate capacitances and the device switching speed. The threshold voltage $V_T$ is reduced under optical illumination condition, which leads the device to change the device property from enhancement mode to depletion mode depending on photon impurity flux density. The resulting I-V characteristics show that the drain-source current IDS for different gate-source voltage $V_{gs}$ is significantly increased with optical illumination for photon flux densities of ${\Phi}=10^{15}\;and\;10^{17}/cm^2s$ compared to the dark condition. Further more, the drain-source current as a function of drain-source voltage $V_{DS}$ is evaluated to find the I-V characteristics for various pinch-off voltages $V_P$ for optimization of impurity flux density $Q_{Diff}$ by diffusion process. The resulting I-V characteristics also show that the diffusion process introduces less process-induced damage compared to ion implantation, which suffers from current reduction due to a large number of defects introduced by the ion implantation process. Further the results show significant increase in gate-source capacitance $C_{gs}$ and gate-drain capacitance $C_{gd}$ for optical illuminations, where the photo-induced voltage has a significant role on gate capacitances. The switching time ${\tau}$ of the OPFET device is computed for dark and illumination conditions. The switching time ${\tau}$ is greatly reduced by optical illumination and is also a function of device active layer thickness and corresponding impurity flux density $Q_{Diff}$. Thus it is shown that the diffusion process shows great potential for improvement of optoelectronic devices in quantum efficiency and other performance areas.

D Flip-Flop과 Confluence Buffer로 구성된 단자속 양자 OR gate의 설계와 측정 (Design and Measurement of an SFQ OR gate composed of a D Flip-Flop and a Confluence Buffer)

  • 정구락;박종혁;임해용;장영록;강준희;한택상
    • Progress in Superconductivity
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    • 제4권2호
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    • pp.127-131
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    • 2003
  • We have designed and measured an SFQ(Single Flux Quantum) OR gate for a superconducting ALU (Arithmetic Logic Unit). To optimize the circuit, we used WRspice, XIC and Lmeter for simulations and layouts. The OR gate was consisted of a Confluence Buffer and a D Flip-Flop. When a pulse enters into the OR gate, the pulse does not propagate to the other input port because of the Confluence Buffer. A role of D Flip-Flip is expelling the data when the clock is entered into D Flip-Flop. For the measurement of the OR gate operation, we attached three DC/SFQs, three SFQ/DCs and one RS Flip -Flop to the OR gate. DC/SFQ circuits were used to generate the data pulses and clock pulses. Input frequency of 10kHz and 1MHzwere used to generate the SFQ pulses from DC/SFQ circuits. Output data from OR gate moved to RS flip -Flop to display the output on the oscilloscope. We obtained bias margins of the D Flip -Flop and the Confluence Buffer from the measurements. The measured bias margins $\pm$38.6% and $\pm$23.2% for D Flip-Flop and Confluence Buffer, respectively The circuit was measured at the liquid helium temperature.

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2-체널 링-코어 플럭스-게이트 콤파스의 위상검출 회로 설계와 구현에 관한 연구 (Design and Realization of Phase Sensitive Detector Circuitry of Two-Channel Ring-Core Flux-Gate Compass)

  • 임정빈
    • 한국항해항만학회지
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    • 제26권1호
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    • pp.127-136
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    • 2002
  • 항공 대잠수함전에 사용되는 방향주파수분석저장 소노부위 (DIFAR Sonobuoy)에 방위정보를 제공하는 플럭스-게이트 콤파스의 위상감응검출 (PSD) 회로 설계와 구현에 관해서 기술하였다. PSD 회로는 쌍동-T RC 회로망을 갖는 능동형 대역필터로 구성하였다. PSD 회로에 대한 성능실험 결과, 대역통과 필터가 지구자장 방향에 비례하는 2Fe의 2차 고조파 신호를 효과적으로 걸러냄을 확인하였다. 그 결과 방위 신호 정보를 획득할 수 있었다.

Measurement and Simulation Study of RSFQ OR gate

  • Nam, Doo-Woo;Jung, Ku-Rak;Hong, Hee-Song;Joonhee Kang
    • 한국초전도ㆍ저온공학회논문지
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    • 제5권1호
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    • pp.44-47
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    • 2003
  • There are several simulation programs in studying superconductor RSFQ (Rapid Single flux Quantum) electronic devices, which include WRspice, WinS, PSCAN, and JSIM. Even though different research groups use different simulation programs, it is not well known about which program gives the simulation results closer to the measurement values. In this work, we used both WRspice and WinS to simulate RSFQ OR gate and to compare the results from the different simulations. This comparison would help in deciding which program is better in the RSFQ circuit design. In the confluence buffer, which is the one of the main components of the DR gate, the measured bias margins were ${\times}23.2%$, while the margins from the simulations were ${\pm}35.56%$ from WRspice and it 53.1% from WinS. However, with the actual fabricated circuit parameters WRspice gave ${\pm}27%$. In WinS the circuit did not operate. We concluded that WRspice is more reliable.