• Title/Summary/Keyword: flip-through

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A study on 2-D wake flow control by acoustic excitation (음파 가진을 이용한 2차원 웨이크 유동 제어에 관한 연구)

  • Kim, Hyeon-Jin;Kim, Jae-Ho;Kim, Myeong-Gyun
    • Transactions of the Korean Society of Mechanical Engineers B
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    • v.22 no.6
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    • pp.860-873
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    • 1998
  • In a low speed open-type wind tunnel, a group of parallel wakes downstream of two dimensional grid model consisting of several circular cylinders were experimentally investigated to study the response of the wake flows to the acoustic excitation, in hoping to promote the understanding of the underlying mechanism behind the gross flow change due to artificial excitation. In the unexcited wake flows, the development of the individual wakes behind cylinders was almost uniform for the ratio of the spacing to the cylinder diameter of s/d.geq.1.5. For smaller s/d, however, the jet streams issued through the gaps between the cylinders became biased in one side and the cylinders had wakes of different sizes. At s/d=1.25, the gap flow directions change in time, leading to unstable wake patterns. Further reduction in s/d made this unstable flip-flopping of the jets stable. The most effective excitation frequency was found to be in the Strouhal number range of St=0.5-0.6. This frequency was related to the vortex shedding. At s/d=1.75, the excitation frequency was 2 or 4 times the vortex shedding frequency. When the flow was excited at this frequency, the vortex sheddings were energized, and pairings between neighboring vortices were generated. Also, the merging process between individual wakes was accelerated. The unstable and unbalanced wake patterns at s/d=2.15 were made stable and balanced. The unstable and unbalanced wake patterns at s/d=2.15 were made stable and balanced. For smaller spacing of s/d .leq,1.0, the acoustic excitation became less effective in controlling the flow.

A Study on the Changes in Class Awareness and Career Awareness According to the Teaching Methods of Some Dental Hygiene and Students: Focusing on the professional tooth cleaning class (일부 치위생과 학생의 수업방법에 따른 수업인식과 진로인식 변화에 관한 연구: 치면세마 수업을 중심으로)

  • Son, Eun-Gyo;Park, Il-Soon
    • Journal of Digital Convergence
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    • v.18 no.11
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    • pp.355-363
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    • 2020
  • This study is conducted to examine the changes in class perception and career perception according to the teaching method for dental hygiene students in some areas of Gangwon-do. Using the same questionnaire, the first questionnaire was conducted after contact classes in December 2019, and the second questionnaire was conducted after non-contact classes in July 2020. Data were analyzed using SPSS Windows 24.0, and the results are as follows. There were differences in class perception and career perception according to grades, and career interest, career curiosity, and career confidence were different according to school life satisfaction and professional tooth cleaning Class satisfaction. In the case of non-contact classes, the proportion of career decisions through the internet increased, and career confidence also increased. These results can be provided as basic data necessary for the use of methods such as flip-learning classes in consideration of the convergence aspect in the practical subject class management and for the production of standardized practical videos for practical tests.

Design of a Timing Error Detector Using Built-In current Sensor (내장형 전류 감지회로를 이용한 타이밍 오류 검출기 설계)

  • Kang, Jang-Hee;Jeong, Han-Chul;Kwak, Chol-Ho;Kim, Jeong-Beom
    • Journal of IKEEE
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    • v.8 no.1 s.14
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    • pp.12-21
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    • 2004
  • Error control is one of major concerns in many electronic systems. Experience shows that most malfunctions during system operation are caused by transient faults, which often mean abnormal signal delays that may result in violations of circuit element timing constraints. This paper presents a novel CMOS-based concurrent timing error detector that makes a flip-flop to sense and then signal whether its data has been potentially corrupted or not by a setup or hold timing violation. Designed circuit performs a quiescent supply current evaluation to determine timing violation from the input changes in relation to a clock edge. If the input is too close to the clock time, the resulting switching transient current in the detection circuit exceeds a reference threshold at the instant of the clock transition and an error is flagged. The circuit is designed with a $0.25{\mu}m$ standard CMOS technology at a 2.5 V supply voltage. The validity and effectiveness are verified through the HSPICE simulation. The simulation results in this paper shows that designed circuit can be used to detect setup and hold time violations effectively in clocked circuit element.

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POLARIZATION OF LYMAN α EMERGENT FROM A THICK SLAB OF NEUTRAL HYDROGEN

  • AHN, SANG-HTEON;LEE, HEE-WON
    • Journal of The Korean Astronomical Society
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    • v.48 no.3
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    • pp.195-202
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    • 2015
  • Star forming galaxies found in the early universe exhibit asymmetric Lyα emission line that results from multiple scattering in a neutral thick medium surrounding the Lyα emission source. It is expected that emergent Lyα will be significantly polarized through a large number of resonance scattering events followed by a number of successive wing scatterings. In this study we adopt a Monte Carlo method to calculate the polarization of Lyα transferred in a very thick static slab of HI. Resonantly scattered radiation associated with transitions between is only weakly polarized and therefore linear polarization of the emergent Lyα is mainly dependent on the number of off-resonant wing scattering events. The number of wing scattering events just before escape from the slab is determined by the product of the Doppler parameter a and the line center optical depth τ0, which, in turn, determines the behavior of the linear polarization of Lyα. This result is analogous to the study of polarized radiative transfer of Thomson scattered photons in an electron slab, where the emergent photons are polarized in the direction perpendicular to the slab when the scattering optical depth is small and polarized in the parallel direction when the slab is optically thick. Our simulated spectropolarimetry of Lyα shows that the line center is negligibly polarized, the near wing parts polarized in the direction parallel to the slab and the far wing parts are polarized in the direction perpendicular to the slab. We emphasize that the flip of polarization direction in the wing parts of Lyα naturally reflects the diffusive nature of the Lyα transfer process in thick neutral media.

Development of the RF SAW filters based on PCB substrate (PCB 기판을 이용한 RF용 SAW 필터 개발)

  • Lee, Young-Jin;Im, Jong-In
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.11 s.353
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    • pp.8-13
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    • 2006
  • Recent RF SAW filters are made using a HTCC package with a CSP(chip scale Package) technology. This paper describes a development of a new $1.4{\times}1.1\;and\;2.0{\times}1.4mm$ RF SAW liters made by PCB substrate instead of HTCC package, and this technology can reduce the cost of materials down to 40%. We have investigated the multi-layered PCB substrate structures and raw materials to find out the optimal flip-bonding condition between the $LiTaO_3$ wafer and PCB substrates. Also the optimal materials and processing conditions of epoxy laminating film were found out through the experiments which can reduce the bending moment caused by the difference of the thermal expansion between the PCB substrate and laminating film. The new PCB SAW filter shows good electrical and reliability performances with respect to the present SAW filters.

Design of a 9 Gb/s CMOS Demultiplexer Using Redundant Multi-Valued logic (Redundant 다치논리 (Multi-Valued Logic)를 이용한 9 Gb/s CMOS 디멀티플렉서 설계)

  • Ahn, Sun-Hong;Kim, Jeong-Beom
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.2
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    • pp.121-126
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    • 2007
  • This paper describes a 9.09 Gb/s CMOS demultiplexer using redundant multi-valued logic (RMVL). The proposed circuit receives serial binary data and is converted to parallel redundant multi-valued data using RMVL. The converted data are reconverted to parallel binary data. By the redundant multi-valued data conversion, the RMVL makes it possible to achieve higher operating speeds than that of a conventional binary logic. The implemented demultiplexer consists of eight integrators. Each integrator is composed of an accumulator, a window comparator, a decoder and a D flip flop. The demultiplexer is designed with Samsung $0.35{\mu}m$ standard CMOS process. The validity and effectiveness are verified through the post layout simulation. The demultiplexer is achieved the maximum data rate of 9.09 Gb/s and the average power consumption of 69.93 mW. This circuit is expected to operate at higher speed than 9.09 Gb/s in the deep-submicron process of the high operating frequency.

Improvement of Reliability of COG Bonding Using In, Sn Bumps and NCA (NCA 물성에 따른 극미세 피치 COG (Chip on Glass) In, Sn 접합부의 신뢰성 특성평가)

  • Chung Seung-Min;Kim Young-Ho
    • Journal of the Microelectronics and Packaging Society
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    • v.13 no.2 s.39
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    • pp.21-26
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    • 2006
  • We developed a bonding at low temperature using fine pitch Sn and In bumps, and studied the reliability of the fine pitch In-Sn solder joints. The $30{\mu}m$ pitch Sn and In bumps were joined together at $120^{\circ}C$. A non conductive adhesive (NCA) was applied during solder joining. Thermal cycling test ($0^{\circ}C-100^{\circ}C$, 2 cycles/h) of up to 2000 cycles was carried out to evaluate the reliability of the solder joints. The bondability was evaluated by measuring the contact resistance (Rc) of the joints through the four point probe method. As the content of filler increased, the reliability improved in the solder joints during thermal cycling test because the contact resistance increased little. The filler redistributed the stress and strains from the thermal shock over the entire joint area.

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Development of flipped learning course model based on instructor coaching (교수자 코칭에 기반한 대학의 플립러닝강좌 개발 모델)

  • Kim, EunHee;Byun, HoSeung
    • The Journal of Korean Association of Computer Education
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    • v.21 no.4
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    • pp.39-52
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    • 2018
  • There has been a lot of interest in flipped learning, but lacked practical research to support the faculty developing flipped learning courses in higher education institutions. The purpose of this study is to develop a consulting model for developing a flipped learning course that can be practically used by institutions such as center for teaching and learning that support faculty teaching to improve the quality of instruction. A 'Coaching based on flip learning course development consulting model' was derived through literature review and expert feedback. The 8-step model is as follows: 1) survey of class development, 2) course orientation, 3) flipped learning, 4) expert class analysis, 5) flipped learning coaching, 6) flipped learning operation, 7) instructor reflection, and 8) feedback and revision. Based on the results of this study, it is possible to provide professional and practical guide systematically, and also help to improve quality of lesson.

FPGA Implementation for Real Time Sobel Edge Detector Block Using 3-Line Buffers (3-Line 버퍼를 사용한 실시간 Sobel 윤곽선 추출 블록 FPGA 구현)

  • Park, Chan-Su;Kim, Hi-Seok
    • Journal of IKEEE
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    • v.19 no.1
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    • pp.10-17
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    • 2015
  • In this Paper, an efficient method of FPGA based design and implementation of Sobel Edge detector block using 3-Line buffers is presented. The FPGA provides the proper and sufficient hardware for image processing algorithms with flexibility to support Sobel edge detection algorithm. A pipe-lined method is used to implement the edge detector. The proposed Sobel edge detection operator is an model using of Finite State Machine(FSM) which executes a matrix mask operation to determine the level of edge intensity through different of pixels on an image. This approach is useful to improve the system performance by taking advantage of efficient look up tables, flip-flop resources on target device. The proposed Sobel detector using 3-line buffers is synthesized with Xilinx ISE 14.2 and implemented on Virtex II xc2vp-30-7-FF896 FPGA device. Using matlab, we show better PSNR performance of proposed design in terms of 3-Line buffers utilization.

Flip Side of Artificial Intelligence Technologies: New Labor-Intensive Industry of the 21st Century (4차 산업혁명시대의 디지털 경공업)

  • Heo, Seokjae;Na, Seunguk;Han, Sehee;Shin, Yoonsoo;Lee, Sanghyun
    • Journal of the Computational Structural Engineering Institute of Korea
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    • v.34 no.5
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    • pp.327-337
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    • 2021
  • The paper acknowledges that many human resources are needed on the research and development (R&D) process of artificial intelligence (AI), and discusses on factors to consider on the current method of development. Enfin, in order to enhance efficiency of AI development, it seems possible through labour division of a few managers and numerous ordinary workers as a type of light industry. Thus, the research team names the development process of AI, which maximizes production efficiency by handling digital resources named 'data' with mechanical equipment called 'computer', as digital light industry of fourth industrial era. As experienced during the previous Industrial Revolution, if human resources are efficiently distributed and utilized, digital light industry would be able to expect progress no less than the second Industrial Revolution, and human resources development for this is considered urgent.