• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.723-728
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• 2006

In this paper, we present a new system, OPTISCOPE SA, especially designed for precise measurement of temporal behavior of LCD displays. We show that gray to gray level response time measurement requires a very sensitive and precise instrument and also that the capacity to measure luminance levels and gamma curve can be useful. Quite often, precise evaluation of LCD response time needs also use of low pass and stop band filters to suppress noise and flicker. Low pass filters affect the results but can be corrected for simple temporal behaviors. For complex temporal behaviors like those observed for overdriven LCDs, we show that direct adjustment of theoretical responses is much more efficient to get a complete picture of the temporal behavior of such displays.

• Proceedings of the Korean Society of Medical Physics Conference
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• 2002.09a
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• pp.363-364
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• 2002

We describe quadrature type surface coil for functional magnetic resonance imaging at 3T MRI system. The coil consisted of two coplanar resonators and was used as both transmitter and receiver. The signal-to-noise ratio (SNR) of the coil was compared with that of a standard birdcage head coil. Visual cortex activation on normal subjects using LED flicker was performed. The SNR of surface coil was found to be better than that of the conventional head coil.

• Journal of the Korea Society of Computer and Information
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• v.22 no.7
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• pp.39-45
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• 2017

In this paper, we propose three compensation methods to solve problems in high-resolution airborne infrared camera and to improve long-range target information acquisition performance. First, image motion and temporal noise reduction technique which is caused by atmospheric turbulence. Second, thermal blurring image correction technique by imperfect performance of NUC(Non Uniformity Correction) or raising the internal temperature of the camera. Finally, DRC(Dynamic Range Compression) and flicker removing technique of 14bits HDR(High Dynamic Range) infrared image. Through this study, we designed techniques to improve the acquisition performance of long-range target information of high-resolution airborne infrared camera, and compared and analyzed the performance improvement result with implemented images.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.10
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• pp.109-117
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• 2004

In this paper, a K-band local oscillator composed of a VCDRO(Voltage Controlled Dielectric Resonator Oscillator), GaAs MESFET, and Reflector type frequency doubler has been designed and fabricated. TO obtain a good phase noise performance of a VCDRO, a active device was selected with a low noise figure and a low flicker noise MESFET and a dielectric resonator was used for selecting stable and high oscillation frequency. Especially, to have a higher conversion gain than a conventional doubler as well as a good harmonic suppression performance with circuit size reduced a doubler structure was employed as the Reflector type composed of a reflector and a open stub of quarter wave length for rejecting the unwanted harmonics. The measured results of fabricated oscillator show that the output power was 5.8 dBm at center frequency 12.05 GHz and harmonic suppression -37.98 dBc, Phase noise -114 dBc at 100 KHz offset frequency, respectively, and measured results show of fabricated frequency doubler, the output power at 5.8 dBm of input power is 1.755 dBm conversion gain 1.482 dB, harmonic suppression -33.09 dBc, phase noise -98.23 dBc at 100 KHz offset frequency, respectively. This oscillator could be available to a local oscillator in K-band which used frequency doubler techniques.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.27 no.2
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• pp.84-94
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• 2013

In case when the existing TRIAC phase controlled dimmer is drove for the LED lighting equipments, there are many problems such as the LED flicker in low phase-angles, the acoustic noise and elements damage by increase of the peak voltage in the input filter capacitor, mulfunction by insufficiency of the TRIAC holding current, and the abnormal oscillation by LC resonant. In this paper, we proposes the single-stage quasi-resonant PSR(Primary Side Regulation) PWM converter, and the design, the simulation and experiment are performed. As a result, it could confirm that the proposed PWM converter is the lighting equipments for LED drive which can alternate the existing 60W class incandescent bulbs and it has the high drive performance of the efficiency 80% and over, the power factor 0.95 and over under the normal voltage 220V. Finally, total harmonic distortion(THD) is gratified with a standard[1] of the lighting equipments and the durability is evaluated as the high reliablilty of 150,000 hours and over.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.05a
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• pp.483-486
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• 2014

A Visual Light Communication(VLC) system is a concept of converging illumination with communication. Design of the VLC system aims mainly at minimizing flicker for the illumination and maximizing transmission distance for the communication. This paper proposes an effective detection scheme of the transmitted signal by attenuating noises which may be included in the signal, and then presents implementation results. Inserting designated low and high pass filters in first and second implementations, the receiver became to improve the perception rate of transmitted signals. This verified a relatively higher possibility of receiving data in a dim light, so that the communication distance can be expanded in the visual light communication system.

• Journal of Semiconductor Engineering
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• v.2 no.1
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• pp.109-118
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• 2021

This review paper describes the overall operating principle of a discrete-time delta-sigma modulator (DTDSM) and a continuous-time delta-sigma modulator (CTDSM) using a switched-capacitor (SC). In addition, research that has solved the problems related to each delta-sigma modulator (DSM) is introduced, and the latest developments are explained. This paper describes the chopper-stabilization technique that mitigates flicker noise, which is crucial for the DSM. In the case of DTDSM, this paper addresses the problems that arise when using SC circuits and explains the importance of the operational transconductance amplifier performance of the first integrator of the DSM. In the case of CTDSM, research that has reduced power consumption, and addresses the problems of clock jitter and excess loop delay is described. The recent developments of the analog front end, which have become important due to the increasing use of wireless sensors, is also described. In addition, this paper presents the advantages and disadvantages of the three-opamp instrumentation amplifier (IA), current feedback IA (CFIA), resistive feedback IA, and capacitively coupled IA (CCIA) methods for implementing instrumentation amplifiers in AFEs.

• Journal of Sensor Science and Technology
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• v.27 no.2
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• pp.93-98
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• 2018

In this paper, an energy-efficient 11.49-bit successive approximation register (SAR) capacitance-to-digital converter (CDC) for capacitive sensors with a figure of merit (FoM) of 31.6 pJ/conversion-step is presented. The CDC employs a SAR algorithm to obtain low power consumption and a simplified structure. The proposed circuit uses a capacitive sensing amplifier (CSA) and a dynamic latch comparator to achieve parasitic capacitance-insensitive operation. The CSA adopts a correlated double sampling (CDS) technique to reduce flicker (1/f) noise to achieve low-noise characteristics. The SAR algorithm is implemented in dual operating mode, using an 8-bit coarse programmable capacitor array in the capacitance-domain and an 8-bit R-2R digital-to-analog converter (DAC) in the charge-domain. The proposed CDC achieves a wide input capacitance range of 29.4 pF and a high resolution of 0.449 fF. The CDC is fabricated in a $0.18-{\mu}m$ 1P6M complementary metal-oxide-semiconductor (CMOS) process with an active area of 0.55 mm2. The total power consumption of the CDC is $86.4{\mu}W$ with a 1.8-V supply. The SAR CDC achieves a measured 11.49-bit resolution within a conversion time of 1.025 ms and an energy-efficiency FoM of 31.6 pJ/step.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.6 s.336
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• pp.59-66
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• 2005

CMOS LC VCO for tri-bind wireless LAN applications was designed in 1.8V 0.18$\mu$m CMOS process. PMOS transistors were chosen for VCO core to reduce flicker noise. The possible operation was verified for 5.8GHz band (5.725$\~$5.825GHz), 5.2GHz band (5.150$\~$5.325GHz), and 2.4GHz band (2.412$\~$2.484GHz) using the switchable L-C resonators. To linearize its frequency-voltage gain (Kvco), optimized multiple MOS varactor biasing technique was used for capacitance linearization and PLL stability improvement. VCO core consumed 2mA current and $570{\mu}m{\times}600{\mu}m$ die area. The phase noise was lower than -110dBc/Hz at 1MHz offset for tri-band frequencies.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.3
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• pp.51-57
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• 2010

A dual-mode direct conversion receiver is developed in $0.13\;{\mu}m$ RF CMOS process for IEEE 802.11n based wireless LAN and IEEE 802.16e based mobile WiMAX application. The RF receiver covers the frequency band between 2.3 and 2.7 GHz. Three-step gain control is realized in LNA by using current steering technique. Current bleeding technique is applied to the down-conversion mixer in order to lower the flicker noise. A frequency divide-by-2 circuit is included in the receiver for LO I/Q differential signal generation. The receiver consumes 56 mA at 1.4 V supply voltage including all LO buffers. Measured results show a power gain of 32 dB, a noise figure of 4.8 dB, a output $P_{1dB}$ of +6 dBm over the entire band.