• Journal of Photoscience
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• v.3 no.2
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• pp.91-93
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• 1996

In connection with our interest on the photochemical properties of heteroaryl halides, which are currently the subject of heterocyclic ring formation and haloarene degradation, we have studied the photochemistry of the haloarene linked to N-heteroarene compounds. Imidazo[5,1-a]isoindole was synthesized from N-(ochlorobenzyl)imidazole or N-(o-bromobenzyl) imidazole in acidic aqueous solution or acetonitrile via the intramolgcular photocyclization (Table 1). This type of reaction provides the synthetic methods for 5- and 6-membered polyheteroatomic heterocyclic ring compounds. However, the reaction mechanism for the intramolecular photocyclization of haloarene tethered heteroarenes has not yet been established. Grimshaw et al. suggested a mechanism for homolyric carbonhalogen bond fission assisted by radical complexation to explain their results in the photocyclization of 5-(2-chlorophenyl)-1,3-diphenylpyrazole. They also reported the detection of acyclohexadienyl intermediate involved in the above reaction. Park et al. reported several transient 'intermediates involved in the laser flash photolysis of N-(o-halobenzyl) pyridinium and N-benzyl-2-halopyridinium salts. Thus we performed the laser flash photolysis study on the photocyclization reaction of N-(o-chlorobenzyl) imidazole to identify the intermediate species involved in the reaction. Here, we report on the preliminary results in the photocyclization reaction of N-(o-halobenzyl)imidazole through the detection of reaction intermediates.

• Nuclear Engineering and Technology
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• v.55 no.9
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• pp.3417-3422
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• 2023

Recently, as the clinically positive biological effects of ultra-high dose rate (UHDR) radiation beams have been revealed, interest in flash radiation therapy has increased. Generally, FLASH preclinical experiments are performed using UHDR electron beams generated by linear accelerators. Real-time monitoring of UHDR beams is required to deliver the correct dose to a sample. However, it is difficult to use typical transmission-type ionization chambers for primary beam monitoring because there is no suitable electrometer capable of reading high pulsed currents, and collection efficiency is drastically reduced in pulsed radiation beams with ultra-high doses. In this study, a monitoring method using bremsstrahlung photons generated by irradiation devices and a water phantom was proposed. Charges collected in an ionization chamber located at the back of a water phantom were analyzed using the bremsstrahlung tail on electron depth dose curves obtained using radiochromic films. The dose conversion factor for converting a monitored charge into a delivered dose was determined analytically for the Advanced Markus® chamber and compared with experimentally determined values. It is anticipated that the method proposed in this study can be useful for monitoring sample doses in UHDR electron beam irradiation.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.310-310
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• 2016

최근 NAND flash memory는 높은 집적성과 데이터의 비휘발성, 낮은 소비전력, 간단한 입, 출력 등의 장점들로 인해 핸드폰, MP3, USB 등의 휴대용 저장 장치 및 노트북 시장에서 많이 이용되어 왔다. 특히, 최근에는 smart watch, wearable device등과 같은 차세대 디스플레이 소자에 대한 관심이 증가함에 따라 유연하고 투명한 메모리 소자에 대한 연구가 다양하게 진행되고 있다. 대표적인 플래시 메모리 소자의 구조로 charge trapping type flash memory (CTF)가 있다. CTF 메모리 소자는 trap layer의 trap site를 이용하여 메모리 동작을 하는 소자이다. 하지만 작은 window의 크기, trap site의 열화로 인해 메모리 특성이 나빠지는 문제점 등이 있다. 따라서 최근, trap layer에 다양한 물질을 적용하여 CTF 소자의 문제점을 해결하고자 하는 연구들이 진행되고 있다. 특히, 산화물 반도체인 zinc oxide (ZnO)를 trap layer로 하는 CTF 메모리 소자가 최근 몇몇 보고 되었다. 산화물 반도체인 ZnO는 n-type 반도체이며, shallow와 deep trap site를 동시에 가지고 있는 독특한 물질이다. 이 특성으로 인해 메모리 소자의 programming 시에는 deep trap site에 charging이 일어나고, erasing 시에는 shallow trap site에 캐리어들이 쉽게 공급되면서 deep trap site에 갇혀있던 charge가 쉽게 de-trapped 된다는 장점을 가지고 있다. 따라서, 본 실험에서는 산화물 반도체인 ZnO를 trap layer로 하는 CTF 소자의 메모리 특성을 확인하기 위해 간단한 구조인 metal-oxide capacitor (MOSCAP)구조로 제작하여 메모리 특성을 평가하였다. 먼저, RCA cleaning 처리된 n-Si bulk 기판 위에 tunnel layer인 SiO2 5 nm를 rf sputter로 증착한 후 furnace 장비를 이용하여 forming gas annealing을 $450^{\circ}C$에서 실시하였다. 그 후 ZnO를 20 nm, SiO2를 30 nm rf sputter로 증착한 후, 상부전극을 E-beam evaporator 장비를 사용하여 Al 150 nm를 증착하였다. 제작된 소자의 신뢰성 및 내구성 평가를 위해 상온에서 retention과 endurance 측정을 진행하였다. 상온에서의 endurance 측정결과 1000 cycles에서 약 19.08%의 charge loss를 보였으며, Retention 측정결과, 10년 후 약 33.57%의 charge loss를 보여 좋은 메모리 특성을 가지는 것을 확인하였다. 본 실험 결과를 바탕으로, 차세대 메모리 시장에서 trap layer 물질로 산화물 반도체를 사용하는 CTF의 연구 및 계발, 활용가치가 높을 것으로 기대된다.

• Proceedings of the Korea Institute of Fire Science and Engineering Conference
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• 2006.04a
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• pp.335-340
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• 2006

• Design Convergence Study
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• v.14 no.5
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• pp.31-45
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• 2015

Recently, due to the development of interactive media, Interactive Typography, which explores user input and interaction is under development. Unlike traditional typography which has a fixed nature, the flexible and fluid nature of Interactive Typography and Interactive System, enables diverse results. In this study, I have developed an Interactive Typography art piece based on theoretical research. By reviewing books, papers and articles, I have tried to define the meaning and characteristics of Interactive Typography. In understanding the concept of Interactive System, I have borrowed the concept of mathematical function. Based on the research, I have designed and developed an Interactive Typography piece, 'Interactive floral type' by using Adobe flash action script. This piece explores the beautiful shape of each alphabet letters and transforms individual character into a 'flower' shape through user's mouse and keyboard input. Depending on the input the size, color, and layout and motion of text changes in real time to change the letters into beautiful flowers.

• Journal of Digital Contents Society
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• v.14 no.2
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• pp.215-222
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• 2013

NAND flash memory-based Solid State Drives (SSD) have lots of merits compared to traditional hard disk drives (HDD). However, random write in SSD is still far slower than sequential read/write and random read. There are two independent approaches to resolve this problem: 1) using part of the flash memory blocks as log blocks, and 2) using internal write buffer (DRAM or Non-Volatile RAM) in SSD. While log blocks are managed by the Flash Translation Layer (FTL), write buffer management has been treated separately from FTL. Write buffer management schemes did not use the exact status of log blocks and log block management schemes in FTL did not consider the behavior of write buffer management scheme. In this paper, we first show that log blocks and write buffer have a tight relationship to each other, which necessitates integrated management of both of them. Since log blocks also can be viewed as another type of write buffer, we can manage both of them as an integrated write buffer. Then we provide three design criteria for the integrated write buffer management scheme which can be very useful to SSD firmware designers.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.1
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• pp.11-20
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• 2008

The structure of 2-bit/cell flash memory device was characterized for sub-50 nm non-volatile memory (NVM) technology. The memory cell has spacer-type storage nodes on both sidewalls in a recessed channel region, and is erased (or programmed) by using band-to-band tunneling hot-hole injection (or channel hot-electron injection). It was shown that counter channel doping near the bottom of the recessed channel is very important and can improve the $V_{th}$ margin for 2-bit/cell operation by ${\sim}2.5$ times. By controlling doping profiles of the channel doping and the counter channel doping in the recessed channel region, we could obtain the $V_{th}$ margin more than ${\sim}1.5V$. For a bit-programmed cell, reasonable bit-erasing characteristics were shown with the bias and stress pulse time condition for 2-bit/cell operation. The length effect of the spacer-type storage node is also characterized. Device which has the charge storage length of 40 nm shown better ${\Delta}V_{th}$ and $V_{th}$ margin for 2-bit/cell than those of the device with the length of 84 nm at a fixed recess depth of 100 nm. It was shown that peak of trapped charge density was observed near ${\sim}10nm$ below the source/drain junction.

• Transactions of the Korean Society of Mechanical Engineers
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• v.13 no.3
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• pp.337-344
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• 1989

The upper bound elemental technique (UBET) is used to simulate the bulk flow characteristics in axisymmetric closed die forging process. Internal flow inside the cavity is predicted using a kinematically admissible velocity field that minimizes the rate of energy consumption. Application of the technique includes an assessment of the formation of flash and of degree of filling in rib-web type cavity using billets with various aspect rations. The technique considering bulging effect is performed in an incremental manner. The results of simulation show how it can be used for the prediction of forging load, metal flow, and free surface profile. The experiments are carried out with plasticine. There are good agreements in forging load and material flow in cavity between the simulation and experiment. The developed program using UBET can be effectively applied to the various forging problems.

• Proceedings of the IEEK Conference
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• 2004.06b
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• pp.469-472
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• 2004

In this paper a current mode sense amplifier suitable for 30nm SONOS flash memories read operation is presented. The proposed sense amplifier employs cross coupled latch type circuit and current mirror to amplify signal from selected memory cell. This sense amplifier provides fast response in low voltage and low current dissipation. Simulation results show the sensing delay time and current dissipation for power supply voltages Vdd to expose limitations of the sense amplifier in various operating conditions.

• Journal of KIISE:Computing Practices and Letters
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• v.16 no.4
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• pp.462-466
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• 2010

A new buffer cache management scheme that aims at reducing power consumption in mixed HDD and NAND flash memory storage systems is presented. The proposed scheme reduces power consumption by considering different energy-consumption rate of storage devices, I/O operation type (read or write), and reference potential of cached blocks in terms of both recency and frequency. Simulation shows that the proposed scheme reduces power consumption by 18.0% on average and up to 58.9%.