• 대한임베디드공학회논문지
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• 제13권5호
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• pp.235-243
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• 2018

NAND flash memory has been widely used for embedded systems as storage device and the flash memory file systems such as JFFS2, YAFFS/YAFFS2 have been adopted by these embedded systems. The flash memory file systems provide the high performance and overcome the limitations of flash memory. However, these file systems don't solve the slow mount time problem when a sudden power failure happens. In this paper, we proposed a flash memory management method for enhancing the recovery performance. The proposed method manages the flash memory block type and stores the block type information at recovery image block. When file operations are occurred, our method stores the file information at the metadata block before and after the file operation. When mounting the flash memory, our method only scans the recovery image blocks and metadata blocks. The proposed method reduces the mount time by seeking the metadata block locations fast by using the recovery image blocks. We implemented the proposed method and evaluation results show that our method reduces the mount time 13 ~ 46 % compared with YAFFS2.

• JSTS:Journal of Semiconductor Technology and Science
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• 제5권4호
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• pp.262-269
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• 2005

Semiconductor scientists and engineers ideally desire the faster but the cheaper non-volatile memory devices. In practice, no single device satisfies this desire because a faster device is expensive and a cheaper is slow. Therefore, in this paper, we use heterogeneous non-volatile memories and construct an efficient hierarchy for them. First, a small RAM device (e.g., MRAM, FRAM, and PRAM) is used as a write buffer of flash memory devices. Since the buffer is faster and does not have an erase operation, write can be done quickly in the buffer, making the write latency short. Also, if a write is requested to a data stored in the buffer, the write is directly processed in the buffer, reducing one write operation to flash storages. Second, we use many types of flash memories (e.g., SLC and MLC flash memories) in order to reduce the overall storage cost. Specifically, write requests are classified into two types, hot and cold, where hot data is vulnerable to be modified in the near future. Only hot data is stored in the faster SLC flash, while the cold is kept in slower MLC flash or NOR flash. The evaluation results show that the proposed hierarchy is effective at improving the access time of flash memory storages in a cost-effective manner thanks to the locality in memory accesses.

• 전자공학회논문지CI
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• 제38권1호
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• pp.26-45
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• 2001

플래쉬 메모리는 데이터의 저장과 변경이 가능하고 전원이 차단되어도 저장된 데이터를 보존할 수 있는 RAM과 ROM의 장점을 모두 가지고 있는 메모리로서, 고성능의 전기 특성을 가지고 있어 이동 환경에서의 저장매체로 매우 접합하다. 향후 많은 정보단말기에 사용하게 될 플래쉬 메모리 및 스마트미디어 카드에 파일을 저장, 삭제, 재생하는 효과적인 알고리즘이 필요하다. 플래쉬 메모리를 일정한 크기의 세그먼트로 할당하고, 파일을 여러 개의 세그먼트로 분산시켜 관리한다. 본 논문에서는 특정 파일이 저장되어 있는 위치를 저장하는 테이블 및 보조 테이블을 이용하여 효과적인 파일 관리 알고리즘을 제시한다. 기존의 알고리즘은 비교적 작은 용량의 플래쉬 메모리를 관리하고 비교적 파일을 빈번한 횟수의 고속 저장, 삭제 등의 작동이 요구되는 응용에는 적합지 않는다. 본 논문에서 제안된 알고리즘은 몇 개의 플래쉬 메모리 칩 및 스마트미디어 카드로 구성된 비교적 큰 용량의 메모리 관리에 적합하다.

• Journal of Computing Science and Engineering
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• 제3권3호
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• pp.181-194
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• 2009

Flash memory is increasingly being used in a wide range of storage applications because of its low power consumption, low access latency, small form factor, and high shock resistance. However, the current platforms for flash memory software development do not meet the ever-increasing requirements of flash memory applications. This paper presents three different hardware platforms for flash memory/NVRAM (non-volatile RAM) software development that overcome the limitations of the current platforms. The three platforms target different types of host system and provide various features that facilitate the development and verification of flash memory/NVRAM software. In this paper, we also demonstrate the usefulness of the three platforms by implementing three different types of storage system (one for each platform) based on them.

• Journal of Information Processing Systems
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• 제14권3호
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• pp.631-644
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• 2018

Many studies on flash memory-based buffer replacement algorithms that consider the characteristics of flash memory have recently been developed. Conventional flash memory-based buffer replacement algorithms have the disadvantage that the operation speed slows down, because only the reference is checked when selecting a replacement target page and either the reference count is not considered, or when the reference time is considered, the elapsed time is considered. Therefore, this paper seeks to solve the problem of conventional flash memory-based buffer replacement algorithm by dividing pages into groups and considering the reference frequency and reference time when selecting the replacement target page. In addition, because flash memory has a limited lifespan, candidates for replacement pages are selected based on the number of deletions.

• 한국컴퓨터정보학회논문지
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• 제24권3호
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• pp.1-9
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• 2019

This paper presents three potential risks in an environment that simultaneously performs the garbage collection and wear leveling in NAND flash memory. These risks may not only disturb the lifespan improvement of NAND flash memory, but also impose an additional overhead of page migrations. In this paper, we analyze the interference of garbage collection and wear leveling and we also provide two theoretical considerations for lifespan prolongation of NAND flash memory. To prove two solutions of three risks, we construct a simulation, based on DiskSim 4.0 and confirm realistic impacts of three risks in NAND flash memory. In experimental results, we found negative impacts of three risks and confirmed the necessity for a coordinator module between garbage collection and wear leveling for reducing the overhead and prolonging the lifespan of NAND flash memory.

• 대한임베디드공학회논문지
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• 제7권4호
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• pp.201-207
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• 2012

Currently, NAND Flash memory has been widely used in consumer storage devices due to its non-volatility, stability, economical feasibility, low power usage, durability, and high density. However, a high capacity of NAND flash memory causes the high power consumption and the low performance. In the convention memory research, a hierarchical filter mechanism can archive an effective performance improvement in terms of the power consumption. In order to attain the best filter structure for NAND flash memory, we selected a direct-mapped filter, a victim filter, a fully associative filter and a 4-way set associative filter for comparison in the performance analysis. According to the results of the simulation, the fully associative filter buffer with a 128byte fetching size can obtain the bet performance compared to another filter structures, and it can reduce the energy*delay product(EDP) by about 93% compared to the conventional NAND Flash memory.

• 대한임베디드공학회논문지
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• 제10권3호
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• pp.151-156
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• 2015

Recently, an embedded flash memory has been widely used for the Internet of Things(IoT). Due to its nonvolatility, economical feasibility, stability, low power usage, and fast speed. With respect to power consumption, the embedded memory system must consider the most significant design factor. The objective of this research is to design high performance and low power NAND flash memory architecture including a dual buffer as a replacement for NOR flash. Simulation shows that the proposed NAND flash system can achieve better performance than a conventional NOR flash memory. Furthermore, the average memory access time of the proposed system is better that of other buffer systems with three times more space. The use of a small buffer results in a significant reduction in power consumption.

• 한국정보과학회논문지:데이타베이스
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• 제37권6호
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• pp.292-299
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• 2010

최근 플래시 메모리가 디지털 기기의 저장장치로 널리 사용됨에 따라 플래시 메모리에서 디지털 증거를 분석하기 위한 디지털 포렌식의 필요성이 증가하고 있다. 이를 위해 플래시 메모리에 저장되어 있는 파일을 효율적으로 복구하는 것이 매우 중요하다. 그러나 기존의 하드 디스크 기반 파일 복구 기법을 플래시 메모리에 그대로 적용하기에는 너무나 비효율적이다. 덮어쓰기 불가능과 같이 플래시 메모리는 하드 디스크와 전혀 다른 특성을 가지기 때문이다. 본 논문에서 디지털 포렌식을 지원하기 위한 플래시 메모리를 잘 이해하는 파일 복구 기법을 제안한다. 첫째, 플래시 메모리 저장장치로부터 복구 가능한 모든 파일들을 효과적으로 검색하는 방법을 제안한다. 이것은 플래시 메모리의 쓰기 연산을 담당하는 FTL(Flash Translation Layer)의 메타데이터를 최대한 활용한다. 둘째, 복구 대상 파일들 중에서 특정 파일을 효율적으로 복구할 수 있는 기법을 제안하며, 이를 위해 FTL의 사상 테이블의 위치 정보를 이용한다. 다양한 실험을 통해 본 논문에 제안하는 기법이 기존의 하드 디스크 기반 파일 복구 기법보다 우수함을 보인다.

• Journal of Information Technology Applications and Management
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• 제11권2호
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• pp.29-43
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• 2004

As the development of an information technique, gradually, mobile device is going to be miniaturized and operates at high speed. By such the requirements, the devices using a flash memory as a storage media are increasing. The flash memory consumes low power, is a small size, and has a fast access time like the main memory. But the flash memory must erase for recording and the erase cycle is limited. JFFS is a representative filesystem which reflects the characteristics of the flash memory. JFFS to be consisted of LSF structure, writes new data to the flash memory in sequential, which is not related to a file size. Mounting a filesystem or an error recovery is achieved through the sequential approach. Therefore, the mounting delay time is happened according to the file system size. This paper proposes a MJFFS to use a multi-checkpoint information to manage a mass flash file system efficiently. A MJFFS, which improves JFFS, divides a flash memory into the block for suitable to the block device, and stores file information of a checkpoint structure at fixed interval. Therefore mounting and error recovery processing reduce efficiently a number of filesystem access by collecting a smaller checkpoint information than capacity of actual files. A MJFFS will be suitable to a mobile device owing to accomplish fast mounting and error recovery using advantage of log foundation filesystem and overcoming defect of JFFS.