• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.9 s.339
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• pp.9-18
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• 2005

To make high-performance, low-power transistors beyond the technology node of 60 nm complementary metal-oxide-semiconductor field-effect transistors(C-MOSFETs) possible, the effect of electron mobility of the thickness of strained Si grown on a relaxed SiGe/SiO2/Si was investigated from the viewpoint of mobility enhancement via two approaches. First the parameters for the inter-valley phonon scattering model were optimized. Second, theoretical calculation of the electronic states of the two-fold and four-fold valleys in the strained Si inversion layer were performed, including such characteristics as the energy band diagrams, electron populations, electron concentrations, phonon scattering rate, and phonon-limited electron mobility. The electron mobility in an silicon germanium on insulator(SGOI) n-MOSFET was observed to be about 1.5 to 1.7 times higher than that of a conventional silicon on insulator(SOI) n-MOSFET over the whole range of Si thickness in the SOI structure. This trend was good consistent with our experimental results. In Particular, it was observed that when the strained Si thickness was decreased below 10 nm, the phonon-limited electron mobility in an SGOI n-MOSFT with a Si channel thickness of less than 6 nm differed significantly from that of the conventional SOI n-MOSFET. It can be attributed this difference that some electrons in the strained SGOI n-MOSFET inversion layer tunnelled into the SiGe layer, whereas carrier confinement occurred in the conventional SOI n-MOSFET. In addition, we confirmed that in the Si thickness range of from 10 nm to 3 nm the Phonon-limited electron mobility in an SGOI n-MOSFET was governed by the inter-valley Phonon scattering rate. This result indicates that a fully depleted C-MOSFET with a channel length of less than 15 m should be fabricated on an strained Si SGOI structure in order to obtain a higher drain current.

• Transactions on Electrical and Electronic Materials
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• v.16 no.2
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• pp.99-102
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• 2015

Thin film transistors (TFTs) with amorphous 2 wt% silicon-doped zinc tin oxide (a-2SZTO) channel layer were fabricated using an RF magnetron sputtering system, and the effect of post-annealing treatment time on the structural and electrical properties of a-2SZTO systems was investigated. It is well known that Si can effectively reduce the generation of oxygen vacancies. However, it is interesting to note that prolonged annealing could have a bad effect on the roughness of a-2SZTO systems, since the roughness of a-2SZTO thin films increases in proportion to the thermal annealing treatment time. Thermal annealing can control the electrical characteristics of amorphous oxide semiconductor (AOS) TFTs. It was observed herein that prolonged annealing treatment can cause bumpy roughness, which led to increase of the contact resistance between the electrode and channel. Thus, it was confirmed that deterioration of the electrical characteristics could occur due to prolonged annealing. The longer annealing time also decreased the field effect mobility. The a-2SZTO TFTs annealed at 500℃ for 2 hours displayed the mobility of 2.17 cm²/Vs. As the electrical characteristics of a-2SZTO annealed at a fixed temperature for long periods were deteriorated, careful optimization of the annealing conditions for a-2SZTO, in terms of time, should be carried out to achieve better performance.

• Proceeding of EDISON Challenge
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• 2013.04a
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• pp.260-263
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• 2013

A semiconducting single-walled carbon nanotube (SWCNT) field-effect transistor (FET) in a top-gate model was constructed. The effect of different high-${\kappa}$ dielectric materials ($Al_2O_3$, $HfO_2$ and HfSiON) and various temperatures with a wide range from 50K to 500K on the performance of such nominal device were investigated. Several key device parameters including the on/off ratio of the current, transconductance ($g_m$), subthreshold swing, and carrier mobility were used to evaluate the device performance. The simulated results fit well with the experiment results previously published.

• Proceedings of the Materials Research Society of Korea Conference
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• 2009.11a
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• pp.48.1-48.1
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• 2009

Performance of organic field-effect transistors (OFETs) with various temperature-cured polyacrylate(PA) copolymer as a gate insulator was studied. The PA thin film, which was cured at an optimized temperature, showed high dielectric strength (>7 MV/cm), low leakage current density ($5{\times}10^{-9}\;A/cm^2$ at 1 MV/cm) and enabled negligible hysteresis in MIS capacitor and OFET. A field-effect mobility of ${\sim}0.6\;cm^2/V\;s$, on/off current ratio (Ion/Ioff) of ${\sim}10^5$ and inverse subthreshold slope (SS) as low as 1.22 V/decwere achieved. The high dielectric strength made it possible to scale down the thickness of dielectric, and low-voltage operation of -5 V was successfully realized. The chemical changes were monitored by FT-IR. The morphology and microstructure of the pentacene layer grown on PA dielectrics were also investigated and correlated with OFET device performance.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.382.1-382.1
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• 2014

Graphene field-effect transistors (GFET) is one of candidates for future high speed electronic devices since graphene has unique electronic properties such as high Fermi velocity (vf=10^6 m/s) and carrier mobility ($15,000cm^2/V{\cdot}s$) [1]. Although the contact property between graphene and metals is a crucial element to design high performance electronic devices, it has not been clearly identified. Therefore, we need to understand characteristics of graphene/metal contact in the GFET. Recently, it is theoretically known that graphene on metal can be doped by presence of interface dipole layer induced by charge transfer [2]. It notes that doping type of graphene under metal is determined by difference of work function between graphene and metal. In this study, we present the GFET fabricated by contact metals having high work function (Pt, Ni) for p-doping and low work function (Ta, Cr) for n-doping. The results show that asymmetric conductance depends on work function of metal because the interfacial dipole is locally formed between metal electrodes and graphene. It induces p-n-p or n-p-n junction in the channel of the GFET when gate bias is applied. In addition, we confirm that charge transfer regions are differently affected by gate electric field along gate length.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11b
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• pp.234-237
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• 2001

FeSi2/Si Layer were grown using FeSi2, Si wafer by the chemical transport reactio nmethod. The directoptical energy gap was found to be 0.871eV at 300 K. The Hall effect is a physical effect arising in matter carrying electric current inthe presence of a magnetic field. The effect is named after the American physicist E. H. Hall, who discovered it in 1879. IN this paper, we study electrical properties of FeSi2/Si layer. And then we measured Hall coefficient Hall mobility,carrier density and Hall voltage according to variation magnetic field and temperature, Because of important part for it applicationVarious phase of silicide is formed at the metal-Si interface when transition metal contacts to Si. Silicides belong to metallic or semiconducting according to their electrical and optical properties. Metallic silicides are used as gate electrodes or interconnections in VLSI devices. Semiconducting silicides can be used as a new material for IR detectors because of their narrow energy band gap.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11a
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• pp.234-237
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• 2001

FeSi$_2$/Si Layer were grown using FeSi$_2$, Si wafer by the chemical transport reaction method. The directoptical energy gap was found to be 0.871ev at 300 K. The Hall effect is a physical effect arising in matter carrying electric current in the presence of a magnetic field. The effect is named after the American physicist E. H. Hall, who discovered it in 1879. In this paper, we study electrical properties of FeSi$_2$/Si layer And then we measured Hall coefficient Hall mobility, carrier density and Hall voltage according to variation magnetic field and temperature, Because of important Part for it application Various phase of silicide is formed at the metal-Si interface when transition metal contacts to Si. Silicides belong to metallic or semiconducting according to their electrical and optical properties. Metallic silicides are used as gate electrodes or interconnections in VLSI devices. Semiconducting silicides can be used as a new material for IR detectors because of their narrow energy band gap.

• Journal of Adhesion and Interface
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• v.21 no.3
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• pp.86-92
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• 2020

We confirmed the effects on the device performances and the charge injection characteristics of organic field-effect transistor (OFET) by selectively differently controlling the surface energies on the contact region of the substrate where the source/drain electrodes are located and the channel region between the two electrodes. When the surface energies of the channel and contact regions were kept low and increased, respectively, the field-effect mobility of the OFET devices was 0.063 ㎠/V·s, the contact resistance was 132.2 kΩ·cm, and the subthreshold swing was 0.6 V/dec. They are the results of twice and 30 times improvements compared to the pristine FET device, respectively. As the results of analyzing the interfacial trap density according to the channel length, a major reason of the improved device performances could be anticipated that the pi-pi overlapping direction of polymer semiconductor molecules and the charge injection pathway from electrode is coincided by selective surface treatment in the contact region, which finally induces the decreases of the charge trap density in the polymer semiconducting film. The selective surface treatment method for the contact region between the electrode and the polymer semiconductor used in this study has the potential to maximize the electrical performances of organic electronics by being utilized with various existing processes to lower the interface resistance.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.340.2-340.2
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• 2014

최근 비정질 산화물 반도체는 가시광 영역에서의 투명도와 낮은 공정 온도, 그리고 높은 Field-effect mobility로 인해 Thin film transistors의 Active channel layer의 재료로 각광 받고 있다. ZnO, IZO, IGO, ITGO등의 많은 산화물 반도체들이 TFT의 채널층으로의 적용을 위해 활발히 연구되고 있으며, 특히 비정질 IGZO는 비정질임에도 불구하고 Mobility가 $10cm^2/Vs$ 정도로 기존의 a-Si:H 보다 높은 Mobility 특성을 나타내고 있어 대화면 디스플레이와 고속 구동을 위한 LCD에 적용 할 수 있으며 또한 낮은 공정 온도로 인해 플렉서블 디스플레이에 응용될 수 있다는 장점이 있다. 우리는 RF magnetron sputtering법으로 증착한 비정질 IGZO TFT(Thin Film Transistors)의 전기적 특성과 IGZO 박막의 특성에 미치는 RF power의 영향을 연구하였다. 제작한 TFTs의 Active channel layer는 산소분압 1%, Room temperature에서 RF power별(50~150 W)로 Si wafer 기판 위에 30nm로 증착 하였고 100 nm의 $SiO_2$가 절연체로 사용되었다. 또한 박막 특성을 분석하기 위해 같은 Chamber 분위기에서 100 nm로 IGZO 박막을 증착하였다. 비정질 IGZO 박막의 X-ray reflectivity(XRR)을 분석한 결과 RF Power가 50 W에서 150 W로 증가 할수록 박막의 Roughness는 22.7 (${\AA}$)에서 6.5 (${\AA}$)로 감소하고 Density는 5.9 ($g/cm^3$)에서 6.1 ($g/cm^3$)까지 증가하는 경향을 보였다. 또한 제작한 IGZO TFTs는 증착 RF Power가 증가함에 따라 Threshold voltage (VTH)가 0.3~4(V)로 증가하는 경향을 나타내고 Filed-effect mobility도 6.2~19 ($cm^2/Vs$)까지 증가하는 경향을 보인다. 또한 on/off ratio는 모두 > $10^6$의 값을 나타내며 subthreshold slope (SS)는 0.3~0.8 (V/decade)의 값을 나타낸다.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.54 no.7
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• pp.304-307
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• 2005

The $In_2S_3\;and\;In_2S_3:Co^{2+}$ thin films were grown by the spray Pyrolysis method. The thin films crystallized into tetragonal structures. The indirect energy band gap was 2.32ev for $In_2S_3\;and\;1.81eV\;for\;In_2S_3:Co^{2+}$ at 298K. The direct energy band gap was 2.67ev for $In_2S_3:Co^{2+}$ thin films. Impurity optical absorption peaks were observed for the $In_2S_3:Co^{2+}$ thin films. These impurity absorption peaks are assigned, based on the crystal field theory to the electron transitions between the energy levels of the $Co^{2+}$ ion sited in $T_{d}$ symmetry. The electrical conductivity($\sigma$), Hall mobility(${\mu}_H$), and carrier concentration (n) of the $In_2Se_3$ thin film were measured, and their temperature dependence was investigated.