• International Journal of Aerospace System Engineering
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• 제4권1호
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• pp.1-8
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• 2017

This paper proposes the load distribution control allocation technique. The proposed method is designed by combining a conventional control allocation method with load distribution ability in order to reduce the stress acting on ailerons. By designing the weighting matrix as a function of the load distribution rule, the optimal deflection angles of each surface to satisfy both control goal and load distribution can be achieved. Moreover, rule based fault-tolerant control technique is also proposed. The rules are generated by considering both dominant control surfaces and the ratio of load distribution among surfaces. The performance of the proposed method is evaluated through numerical simulations.

• 한국항공우주학회지
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• 제31권4호
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• pp.105-111
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• 2003

과학위성 1호 탑재 컴퓨터의 인증모델 개발이 완료되었다. 과학위성 1호 탑재 컴퓨터는 우리별 3호에 비하여 FPGA를 사용함으로써 크기 및 무게의 소형화를 추구하였고, 네트워크 제어기를 내장함으로써 고속으로 위성 네트워크에 접속할 수 있도록 하였다. 또한 우주환경에서 직면하게 되는 SEU(Single Event Upset)에 대한 강인성이 증대되었고, 내고장성도 증대되었다. 개발된 탑재 컴퓨터는 환경시험에서 모든 기능이 정상 동작함을 확인하였다.

• 한국정보과학회논문지:시스템및이론
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• 제27권1호
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• pp.53-60
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• 2000

본 논문의 목적은 네트워크상에서 한 시스템의 요소가 결함으로 인해 통신장애를 일으키는 경우에 대하여 새로운 회복알고리즘을 제안하는 것이다. 또한 인접행렬을 사용하면서 그 알고리즘을 시뮬레이션한다. 우리는 제안된 알고리즘의 한 번 수행시 하나의 결함노드를 복구하도록 하여 결국 결함시스템을 점진적으로 통신가능한 네트워크로 재구성 할 수 있다. 그렇게 하기위해 본문에서는 인접행렬을 이용하며 시뮬레이션된 회복과정을 연결한 MATRECO라는 새로운 회복알고리즘을 제시하였다.

• 전기학회논문지
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• 제62권8호
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• pp.1108-1114
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• 2013

This paper presents a new winding topology for MW class offshore wind generator having modular and dual 3-phase. Based on proposed simplified relationship between magnetic flux and phase current in the air gap, several new windings for modular and dual 3-phase are made. In case of one inverter operation or faulty operation, the proposed model can have balanced 3-phase induced voltage whereas the conventional generator with modular winding has unbalanced induced voltage, which can be important issue in offshore generator. The model was applied into 6MW prototype machine with dual 3-phase. Using finite element analysis, induced voltage, inductance were investigated. The results show that the proposed modular winding can be applicable to dual inverter system with electrically balanced voltage.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 추계학술대회 논문집 학회본부 A
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• pp.70-72
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• 1999

Actuator (chopper) and sensors failures resulting from electric shock and mechanical vibration generating by rail irregularities are the serious problem deteriorating the performance in the electromagnetic suspension systems. Thus, this paper proposes the reliable output feedback controller for the electromagnetic levitation systems against actuator, air-gap sensor and acceleration sensor failures. The designed controller is an extend version of a novel design technique which has the design method of the output feedback controller using dynamic compensator. The benefits of this scheme are demonstrated through the experimental results for the proposed controller against chopper, air-gap sensor and acceleration sensor failures of electromagnetic levitation system.

• 연구논문집
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• 통권30호
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• pp.79-92
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• 2000

Chopper and sensors failures resulting from electric shock and mechanical vibration generated by rail irregularities are the serious problem deteriorating the performance in the electromagnetic suspension systems. Thus, this paper proposes a reliable output feedback control scheme for the electromagnetic suspension systems in the present of chopper, gap sensor and acceleration sensor failures. The designed controller is an extended version of a novel design technique which has the design method of the output feedback controller using dynamic compensator. The benefits of this scheme are demonstrated through the simulation and experimental results for proposed controller against chopper, gap sensor and acceleration sensor failures of electromagnetic suspension system.

• 한국우주과학회:학술대회논문집(한국우주과학회보)
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• 한국우주과학회 2004년도 한국우주과학회보 제13권2호
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• pp.293-295
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• 2004

The Engineering Model of on-board computer was developed and tested completely with other sub-systems for STSAT-2. We designed the on-board computer of STSAT-2 which has some improved features compared with that of STSAT-l. A remarkable change is that the on-board computer has a structure of centeralized network communication without a Network Controller of the STSAT-l. That is, the on-board computer directly manages a satellite network. In addition, as many logics are implemented by Field Programmable Gate Array, so we can reduce the weight and size of on-board computer. Also, the developed on-board computer has more improved tolerance against Single Event Upsets and faults than that of the STSAT-l.

• 정보처리학회논문지A
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• 제8A권4호
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• pp.461-468
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• 2001

Large-scale distributed applications based on Internet and client/server applications have to deal with series of problems such as load balancing, unpredictable communication delays, partial errors, and networking failures. Therefore, sophisticated applications such as teleconferencing, video-on-demand, and concurrent software engineering require an abstracted communication. In this paper, we present our design, implementation and performance analysis of group communication using the CORBA ORB, JAVA RMI, Socket based on distributed computing. We anticipate our study may apply to the various field of applications such as fault-tolerant client/server system, groupware, scalable text retrieval system, and financial information systems.

• 한국멀티미디어학회:학술대회논문집
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• 한국멀티미디어학회 2003년도 춘계학술발표대회논문집
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• pp.19-22
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• 2003

현대 사회는 인터넷과 네트워크의 발전과 더불어 많은 성장을 거듭해 왔고, 인터넷을 이용한 많은 서비스들은 계속해서 생기고 있다. 이러한 사회적인 배경에서 인터넷을 이용한 서비스에 대한 의존도도 또한 급격하게 증가하고 있다. 서비스를 언제, 어디서나 접근이 가능하게 함으로써 사용자들이 편리한 서비스를 제공받을 수 있게 되었지만, 이러한 서비스들이 안정적으로 제공되어야 한다. 고로 본 논문에서는 컴퓨터 시스템에 대한 신뢰성을 확보하기 위해 사용되는 기법 중 소프트웨어적인 고장 감내 시스템에 대해 알아보고 그에 따른 기법들을 조사하여 단일 시스템에서 구현해 볼 수 있는 방법 중 감시 프로세스를 이용하여 서비스를 안정적으로 서비스를 할 수 있는지에 대해 알아보았다.

• 전기학회논문지
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• 제57권1호
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• pp.128-136
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• 2008

In this paper, we propose a new cache structure for effective error correction of soft error. We added check bit and SEEB(soft error evaluation block) to evaluate the status of cache line. The SEEB stores result of parity check into the two-bit shit register and set the check bit to '1' when parity check fails twice in the same cache line. In this case the line where parity check fails twice is treated as a vulnerable to soft error. When the data is filled into the cache, the new replacement algorithm is suggested that it can only use the valid block determined by SEEB. This structure prohibits the vulnerable line from being used and contributes to efficient use of cache by the reuse of line where parity check fails only once can be reused. We tried to minimize the side effect of the proposed cache and the experimental results, using SPEC2000 benchmark, showed 3% degradation in hit rate, 15% timing overhead because of parity logic and 2.7% area overhead. But it can be considered as trivial for SEEB because almost tolerant design inevitably adopt this parity method even if there are some overhead. And if only parity logic is used then it can have $5%{\sim}10%$ advantage than ECC logic. By using this proposed cache, the system will be protected from the threat of soft error in cache and the hit rate can be maintained to the level without soft error in the cache.