• The Transactions of the Korean Institute of Electrical Engineers
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• v.39 no.4
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• pp.341-348
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• 1990

This paper describes an algorithm for evaluating the Loss of Load Probability (LOLP) and calculating the production cost for all the generators in the system using Fast Hartley Transform (FHT). It also suggests the deconvolution procedure which is necessary for the generation expansion planning. The FHT is as fast as or faster than the Fast Fourier Transform (FFT) and serves for all the uses such as spectral, digital processing, and convolution to which the FFT is normally applied. The transformed function using FFT has complex numbers. However, the transformed function using FHT has real numbers and the convolution become quite simple. This method has been applied for the IEEE reliability test system and practical size model system. The test results show the effectiveness of the proposed method.

• Journal of the Korean Society for Railway
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• v.9 no.1 s.32
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• pp.63-68
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• 2006

This paper proposes a fast Fourier transform(FFT)-based spectral analysis method(SAM) for the dynamic responses of the linear discrete dynamic models with non-proportional damping. The SAM was developed by using discrete Fourier transform(DFT)-theory. To verify the proposed SAM, a three-DOF system with non-proportional viscous damping is considered as an illustrative example. The present SAM is evaluated by comparing the dynamic responses obtained by SAM with those obtained by Runge-Kutta method.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.16 no.1
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• pp.683-690
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• 2015

Two basic FFT(Fast Fourier Transform) algorithms are the DIT(Decimation-In-Time) and the DIF (Decimation-In-Frequency). In spite of the advantage of the DIT algorithm is to generate a sequential output, various structures have not been made. In this paper, a new DIT Radix-4 FFT butterfly structure are proposed and implemented using Verilog coding. Through synthesis, it is shown that the 64-point FFT is implemented by 6.78 million gates. Since the proposed FFT structure has the advantage of a sequential output, it can be used in OFDM communication SoC(System on a Chip) which need a high speed FFT output.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2010.10a
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• pp.88-91
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• 2010

This paper describes a design of fast Fourier transform(FFT) processor for EEG(electroencephalogram) signal analysis for health care services. Hamming window function with 1/2 overlapping is adopted to perform short-time FFT(ST-FFT) of a long period EEG signal occurred in real-time. In order to analyze efficiently EEG signals which have frequency characteristics in the range of 0 Hz to 100 Hz, a 256-point FFT processor based on single-memory bank architecture and radix-4 algorithm is designed. The designed FFT processor has high accuracy with arithmetic error less than 3%.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.11
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• pp.2548-2554
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• 2010

This paper describes a design of fast Fourier transform(FFT) processor for EEG(electroencephalogram) signal analysis for health care services. Hamming window function with 1/2 overlapping is adopted to perform short-time FFT(ST-FFT) of a long period EEG signal occurred in real-time. In order to analyze efficiently EEG signals which have frequency characteristics in the range of 0 Hz to 100 Hz, a 256-point FFT processor is designed, which is based on a single-memory bank architecture and the radix-4 algorithm. The designed FFT processor has been verified by FPGA implementation, and has high accuracy with arithmetic error less than 2%.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.1
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• pp.72-80
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• 2015

In distributed generation systems, a grid-connected inverter should operate with synchronization to grid voltage. Considering that synchronization requires the phase angle of grid voltage, a phase locked loop (PLL) scheme is often used. The synchronous reference frame phase locked loop (SRF-PLL) is generally known to provide reasonable performance under ideal grid voltage. However, this scheme indicates performance degradation under the harmonic distorted or unbalanced grid voltage condition. To overcome this limitation, this paper proposes a phase and harmonic detection method of grid voltage using fast Fourier transform (FFT). To reduce the calculation time of FFT algorithm, minimum sampling data is taken from the voltage measurement to determine the phase angle and the magnitude of harmonic components. An experimental test setup for a grid-connected inverter system has been constructed. By comparative simulations and experiments under various abnormal grid voltage conditions, the proposed scheme has been proven to effectively track the phase angle of the grid voltage.

• Proceedings of the Korean Society of Tribologists and Lubrication Engineers Conference
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• 2002.10b
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• pp.255-256
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• 2002

In this paper, the frictional behavior according to the contact geometry was investigated using a micro-tribotester built inside a Scanning Electron Microscope (SEM) and an Atomic Force Microscope (AFM). FFT (Fast Fourier Transform) analysis for friction was conducted as a method to interpret the contact condition. From the experimental results, it could be concluded that the relative dimensions and distribution of contact asperities on the surface could be predicted by the power spectrum and main frequency in the FFT analysis of the friction signal.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2007.04a
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• pp.477-480
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• 2007

저전력 OFDM(orthogonal frequency division multiplexing) 시스템용 FFT(Fast-Fourier-Transform) LSI를 저전력 동작을 시키기 위해서 FFT LSI는 current-mode 회로로 구현되었다. Current-mode FFT LSI에서, VIC(Voltage-to-current converter)는 입력 전압 신호를 전류로 바꾸는 first main device이다. 저전력 OFDM을 위해 FFT LSI와 VIC가 한 개의 칩과 결합되는 것을 고려하면, VIC는 전력 손실은 낮고, VIC와 FFT LSI 사이에서의 DC offset 전류는 최소인 작은 크기의 chip으로 설계되어야 한다. 본 논문에서는 새로운 VIC를 제안한다. 선형 동작구간을 넓히고 DC offset 전류를 대폭 감소하는 방법을 제시하였다. VIC는 0.35[um] CMOS process로 구현되었으며, 시뮬레이션 결과에 따르면 제안된 VIC는 current-mode FFT LSI와 0.1[uA] 미만의 매우 작은 DC offset 전류, 1.4[V]의 넓은 선형구간을 갖으며, 저전력으로 동작한다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.7A
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• pp.1005-1015
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• 1999

This paper is concerned with an improvement on IFFT (inverse fast Fourier transform) and FFT based baseband digital implementation algorithm for BPSK (binary phase shift keying)-modulated MC-CDMA (multicarrier-code division multiple access) systems, that is functionally equivalent to the conventional implementation algorithm, while reducing computational complexity and bandwidth requirement. We also derive an equalizer structure for the proposed implementation algorithm. The proposed algorithm is based on a variant of FFT algorithm that utilizes a N/2-point FFT/IFFT for simultaneous transformation and reconstruction of two N/2-point real signals. The computer simulations under additive white Gaussian noise channels and frequency selective fading channels using equal gain combiner and maximal ratio combiner diversities, demonstrate the performance of the proposed algorithm.

• Journal of IKEEE
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• v.23 no.2
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• pp.614-621
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• 2019

In this paper, we presents the integral equation-fast Fourier transform(IE-FFT) and block matrix preconditioner (BMP) to solve electromagnetic scattering problems of penetrable structures composed of dielectric or magnetic materials. IE-FFT can significantly improve the amount of calculation to solve the matrix equation constructed from the moment method(MoM). Moreover, the iterative method in conjunction with BMP can be significantly reduce the number of iterations required to solve the matrix equations which are constructed from electrically large structures. Numerical results show that IE-FFT and block matrix preconditioner can solve electromagnetic scattering problems for penetrable objects quickly and accurately.