• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.8 no.2
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• pp.15-21
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• 2008

This paper discuss the sequential digital logic systems and arithmetic operation algorithms which is the important material in computer architecture using analysis and synthesis which is based on extension logic for binary logic over galois fields. In sequential digital logic systems, we construct the moore model without feedback sequential logic systems after we obtain the next state function and output function using building block T-gate. Also, we obtain each algorithms of the addition, subtraction, multiplication, division based on the finite fields mathematical properties. Especially, in case of P=2 over GF($P^m$), the proposed algorithm have a advantage which will be able to apply traditional binary logic directly.The proposed method can construct more efficiency digital logic systems because it can be extended traditional binary logic to extension logic.

• Korean Journal of Logic
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• v.5 no.2
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• pp.93-114
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• 2002

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.05a
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• pp.675-676
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• 2013

This paper presents a design method for multiple-output combinational digital logic systems using time domain based on multiplexing and common multi-terminal extension decision diagrams. The common multi-terminal extension decision diagrams represents extension valued multiple-output functions, while time domain based on multiplexing systems transmit several signals on a single lines. The proposed method can reduce the 1)hardware, 2)logic levels and 3)pins. In the logic system design, we use two types of decision diagrams, that is the common binary decision diagrams and common multi-terminal extension decision diagrams.

• Korean Journal of Logic
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• v.12 no.2
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• pp.115-139
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• 2009

This paper investigates an extension of the uninorm (based) logic UL, which is obtained by adding (t-weakening, $W_t$) (($\phi$ & $\psi$) ${\wedge}$ t) $\rightarrow$ $\phi$ to UL introduced by Metcalfe and Montagna in [8]. First, the t-weakening uninorm logic $UL_{Wt}$ (the UL with $W_t$) is introduced. The algebraic structures corresponding to $UL_{Wt}$ is then defined, and its algebraic completeness is established. Next standard completeness (i.e. completeness on the real unit interval [0, 1]) is established for this logic by using Jenei and Montagna-style approach for proving standard completeness in [3, 6].

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.6
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• pp.1288-1293
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• 2005

This paper presents a design method for multiple-output combinational digital logic systems using time domain based on multiplexing(TDBM) and common multi-terminal extension decision diagrams(CMTEDD). The CMIEDDs represents extension valued multiple-output functions, while TDBM systems transmit several signals on a single lines. The proposed method can reduce the 1)hardware, 2)logic levels and 3)pins. In the logic system design, we use two types of decision diagrams(DDs), that is the common binary decision diagrams(CBDDs) and CMTEDDs. Also, we propose an algorithms to derive common multiple-terminal binary decision diagrams(CMTBDD) from CBDDs, and CMTEDDs from CMTBDDs. The CMTEDDs over CBDDs is more compactness in terms of number of non-terminal nodes, where the nodes for output selection variables are not included in the non-terminal nodes. In the logic design, each non-terminal nodes of an CBDDs and an CMTEDDs is realized by a multiplexer(MUX). In addition, we compare the proposed TDBM realization with the conventional one.

• Korean Journal of Logic
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• v.21 no.1
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• pp.39-57
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• 2018

This paper deals with non-algebraic Kripke-style semantics, i.e, set-theoretical Kripke-style semantics, for weakening-free non-commutative fuzzy logics. We first recall an extension of the pseudo-uninorm based fuzzy logic HpsUL, $CnHpsUL^*$. We next introduce set-theoretical Kripke-style semantics for it.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.6
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• pp.622-634
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• 2013

The circuit level implementation of nanoscale Insulated Shallow Extension Silicon On Nothing (ISE-SON) MOSFET has been investigated and compared with the other conventional devices i.e. Insulated Shallow Extension (ISE) and Silicon On Nothing (SON) using the ATLAS 3D device simulator. It can be observed that ISE-SON based inverter shows better performance in terms of Voltage Transfer Characteristics, noise margin, switching current, inverter gain and propagation delay. The reliability issues of the various devices in terms of supply voltage, temperature and channel length variation has also been studied in the present work. Logic circuits (such as NAND and NOR gate) and ring oscillator are also implemented using different architectures to illustrate the capabilities of ISE-SON architecture for high speed logic circuits as compared to other devices. Results also illustrates that ISE-SON is much more temperature resistant than SON and ISE MOSFET. Hence, ISE-SON enables more aggressive device scaling for low-voltage applications.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.4
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• pp.863-868
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• 2013

In recently years, many digital logic systems based on graph theory are analyzed and synthesized. This paper presented a method of constructing the function using edge valued extension graph which is based on graph theory. The graph is applied to a new data structure. from binary graph which is recently used in constructing the digital logic systems based on the graph theory. We discuss the mathematical background of literal and reed-muller expansion, and we discuss the edge valued extension graph which is the key of this paper. Also, we propose the algorithms which is the function derivation based on the proposed edge valued extension graph. That is the function minimization method of the n-variables m-valued functions and showed that the algorithm had the regularity with module by which the same blocks were made concerning about the schematic property of the proposed algorithm.

• Korean Journal of Logic
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• v.17 no.2
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• pp.323-349
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• 2014

In this paper, we show that the standard completeness for the extension of UL with compensation-free reinforcement (cfr) $(({\phi}&{\psi}){\rightarrow}({\phi}{\wedge}{\psi})){\vee}(({\phi}{\vee}{\psi}){\rightarrow}({\phi}&{\psi}))$ can be established. More exactly, first, the compensation-freely reinforced uninorm logic $UL_{cfr}$ (the UL with (cfr)) is introduced. The algebraic structures of $UL_{cfr}$ are then defined, and its algebraic completeness is established. Next, standard completeness (i.e. completeness on [0, 1]) is established for $UL_{cfr}$ by using the method introduced in Yang (2009).

• Korean Journal of Logic
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• v.19 no.1
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• pp.107-126
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• 2016

This paper deals with Kripke-style semantics for weakening-free non-commutative fuzzy logics. As an example, we consider an algebraic Kripke-style semantics for an extension of the pseudo-uninorm based fuzzy logic HpsUL, $CnHpsUL^*$. For this, first, we recall the system $CnHpsUL^*$, define its corresponding algebraic structures $CnHpsUL^*$-algebras, and algebraic completeness results for it. We next introduce a Kripke-style semantics for $CnHpsUL^*$, and connect it with algebraic semantics.